First Steps in Porting the LFRic Weather and Climate Model to the FPGAs of the EuroExa Architecture
First Steps in Porting the LFRic Weather and Climate Model to the FPGAs of the EuroExa Architecture
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将 LFRic 天气和气候模型移植到 EuroExa 架构 FPGA 的第一步
DOI：
10.1155/2019/7807860
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发表时间：
2019
影响因子：
--
通讯作者：
Ashworth M
中科院分区：
文献类型：
--
作者：
Ashworth M
近年来，现场可编程门阵列(FPGA)在高性能计算(HPC)中的应用重新引起了人们的兴趣。本文以LFRIC天气气候模型为例，探讨了传统高性能计算程序员在将高性能计算应用程序移植到现场可编程门阵列时所需要的技术。我们报告了将LFRIC移植到EuroExa体系结构的现场可编程门阵列的第一步。我们使用Vivado High-Level Syntheusywwi在Xilinx UltraScale+开发板上实现了由lFric代码生成的矩阵向量内核，该开发板包含XCZU9EG多处理器片上系统。我们描述了代码的移植，讨论了优化决策，并报告了双精度5.34 触发器/S和单精度5.58 G触发器/S的性能。我们讨论了低效率的来源，与峰值性能的比较，与CPU和GPU性能的比较(考虑到功率和价格)，与已公布的技术的比较，以及与已公布的性能的比较，并对天气预报模式的FPGA加速的未来发展前景进行了一些评论。要实现实用的亿级高性能计算，需要显著提高此类系统及其组件的能效。这引起了人们对计算机体系结构的兴趣，这些计算机体系结构在使用传统CPU的同时使用加速器。作为一种加速器，现场可编程门阵列具有巨大的潜力，可以在高能效水平下为科学应用提供性能。EuroExa项目正在开发和构建一个基于ARM CPU的高性能体系结构，并使用FPGA加速，目标是在现实的功率预算内实现亿级性能。
In recent years, there has been renewed interest in the use of field‐programmable gate arrays (FPGAs) for high‐performance computing (HPC). In this paper, we explore the techniques required by traditional HPC programmers in porting HPC applications to FPGAs, using as an example the LFRic weather and climate model. We report on the first steps in porting LFRic to the FPGAs of the EuroExa architecture. We have used Vivado High‐Level Syntheusywwi to implement a matrix‐vector kernel from the LFRic code on a Xilinx UltraScale+ development board containing an XCZU9EG multiprocessor system‐on‐chip. We describe the porting of the code, discuss the optimization decisions, and report performance of 5.34 Gflop/s with double precision and 5.58 Gflop/s with single precision. We discuss sources of inefficiencies, comparisons with peak performance, comparisons with CPU and GPU performance (taking into account power and price), comparisons with published techniques, and comparisons with published performance, and we conclude with some comments on the prospects for future progress with FPGA acceleration of the weather forecast model. The realization of practical exascale‐class high‐performance computinems requires significant improvements in the energy efficiency of such systems and their components. This has generated interest in computer architectures which utilize accelerators alongside traditional CPUs. FPGAs offer huge potential as an accelerator which can deliver performance for scientific applications at high levels of energy efficiency. The EuroExa project is developing and building a high‐performance architecture based upon ARM CPUs with FPGA acceleration targeting exascale‐class performance within a realistic power budget.
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DOI：
10.48550/arxiv.1809.07267
发表时间：
2018
期刊：
arXiv e-prints
影响因子：
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作者：
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发表时间：
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期刊：
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影响因子：
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影响因子：
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作者：
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影响因子：
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