Room-temperature vacancy migration in crystalline Si from an ion-implanted surface layer
Room-temperature vacancy migration in crystalline Si from an ion-implanted surface layer
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DOI：
10.1063/1.371453
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发表时间：
1999-10
影响因子：
3.2
通讯作者：
A. Larsen;C. Christensen;J. W. Petersen
中科院分区：
文献类型：
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作者：
A. Larsen;C. Christensen;J. W. Petersen
通过使用深能级瞬态谱（DLTS）追踪底层中P-V对（E中心）的存在，研究了室温下Ge+注入（150 keV，5×109-1×1011 cm−2）表面层中晶体n型硅中空位的迁移。在我们所研究的条件下，空位迁移的最大深度约为1 μm，并且每个注入的Ge离子至少有一个空位迁移到硅晶体中。E中心的退火几乎是一对一的，伴随着一条新的DLTS线的出现，对应于EC−Et = 0.15 eV的能级，具有施主特征。有人认为，与这条线相关的中心很可能是P2-V复合体;它在大约550 K退火。双电荷负空位的RT扩散系数的下限估计为4×10−11 cm 2/s。
Migration of vacancies in crystalline, n-type silicon at room temperature from Ge+-implanted (150 keV, 5×109–1×1011 cm−2) surface layers was studied by tracing the presence of P–V pairs (E centers) in the underlying layer using deep level transient spectroscopy (DLTS). Under the conditions we have examined, the vacancies migrate to a maximum depth of about 1 μm and at least one vacancy per implanted Ge ion migrates into the silicon crystal. The annealing of the E centers is accompanied, in an almost one-to-one fashion, by the appearance of a new DLTS line corresponding to a level at EC−Et≈0.15 eV that has donor character. It is argued that the center associated with this line is most probably the P2–V complex; it anneals at about 550 K. A lower limit of the RT-diffusion coefficient of the doubly charged, negative vacancy is estimated to be 4×10−11 cm2/s.