IBM POWER8 circuit design and energy optimization
IBM POWER8 circuit design and energy optimization
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IBM POWER8 电路设计和能量优化
DOI：
10.1147/jrd.2014.2380200
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发表时间：
2015
期刊：
影响因子：
--
通讯作者：
S. Posluszny
中科院分区：
文献类型：
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作者：
V. Zyuban;J. Friedrich;D. Dreps;J. Pille;D. Plass;P. Restle;Z. Deniz;M. Ziegler;S. Chu;M. S. Islam;J. Warnock;B. Philhower;R. Rao;G. Still;David Shan;Eric Fluhr;Jose Paredes;D. Wendel;Christopher J. Gonzalez;David Hogenmiller;R. Puri;Scott A. Taylor;S. Posluszny
IBM POWER8™ 处理器为 649 毫米 $^{2} $
42 亿晶体管高频微处理器采用 IBM 22 纳米绝缘体硅 (SOI) 技术制造，具有嵌入式动态随机存取存储器 (eDRAM) 和 15 层金属。凭借 12 个架构增强型八路多线程内核、96 MB 高带宽共享三级缓存以及增加的片内和片外带宽，POWER8 处理器可提供业界领先的性能。本文介绍了用于实现该芯片的电路技术和设计方法，使其能够将功耗保持在其前身的水平，同时将每个插槽的性能提高三倍。该处理器采用的创新技术包括谐振时钟、片上每核电压调节和增强型 eDRAM 阵列。
The IBM POWER8™ processor is a 649-mm $^{2} $
, 4.2-billion transistor, high-frequency microprocessor fabricated in the IBM 22-nm silicon on insulator (SOI) technology with embedded dynamic random access memory (eDRAM) and 15 layers of metal. With its twelve architecturally enhanced, eight-way multithreaded cores, 96-MB high-bandwidth shared third-level cache, and increased on and off-chip bandwidth, the POWER8 processor delivers industry-leading performance. This paper describes the circuit techniques and design methodologies that were employed for implementing this chip and that allowed it to maintain the power dissipation at the level of its predecessor while delivering a threefold increase in per-socket performance. Among the innovative technologies employed by the processor are resonant clocking, on-chip per-core voltage regulation, and enhanced eDRAM arrays.