An Efficient Implementation of LZW Decompression in the FPGA

An Efficient Implementation of LZW Decompression in the FPGA
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DOI:
10.1007/978-3-319-49583-5_39
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发表时间:
2016-03
期刊:
2016 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)
影响因子:
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通讯作者:
Xin Zhou;Yasuaki Ito;K. Nakano
Xin Zhou;Yasuaki Ito;K. Nakano
中科院分区:
其他
文献类型:
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作者:
Xin Zhou;Yasuaki Ito;K. Nakano

文献摘要

相似文献

LZW算法是最著名的基于字典的压缩和解压缩算法之一。本文的主要贡献是提出了一种硬件LZW解压缩算法,并在一片FPGA中实现。实验结果表明,在VIRTEX-7系列FPGA XC7VX485T-2上实现的一个模块,在频率为301.02 MHz的单CPU上,比顺序LZW解压缩快2.16倍。由于所提出的模块设计紧凑,并且使用了少量的FPGA资源,我们已经成功地实现了150个相同的模块,这些模块在频率为245.4 MHz的FPGA上并行工作。换句话说,我们的实现比单CPU上的顺序实现最多快264倍。
LZW algorithm is one of the most famous dictionary-based compression and decompression algorithms. The main contribution of this paper is to present a hardware LZW decompression algorithm and to implement it in an FPGA. The experimental results show that one proposed module on Virtex-7 family FPGA XC7VX485T-2 runs up to 2.16 times faster than sequential LZW decompression on a single CPU, where the frequency of FPGA is 301.02MHz. Since the proposed module is compactly designed and uses a few resources of the FPGA, we have succeeded to implement 150 identical modules which works in parallel on the FPGA, where the frequency of FPGA is 245.4MHz. In other words, our implementation runs up to 264 times faster than a sequential implementation on a single CPU.