Lightweight Hardware Implementation of R-LWE Lattice-Based Cryptography
Lightweight Hardware Implementation of R-LWE Lattice-Based Cryptography
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DOI：
10.1109/apccas.2018.8605630
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发表时间：
2018-10
期刊：
影响因子：
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通讯作者：
Sailong Fan;Weiqiang Liu;James Howe;A. Khalid;Máire O’Neill
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文献类型：
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作者：
Sailong Fan;Weiqiang Liu;James Howe;A. Khalid;Máire O’Neill
基于格的密码学（LBC）是最有前途的后量子密码学候选者之一。带误差环学习（R-LWE）是LBC的一种加密方案。本文提出了一种轻量级的硬件实现，包括密钥生成，加密和解密。R-LWE加密方案由高斯采样器和多项式乘法组成。本文采用累积分布表（CDT）作为高斯采样器，采用教科书方法进行多项式乘法运算。这种架构的目的是实现高频小面积消耗。在Xilinx Kintex-7 FPGA上的硬件实现结果表明，该设计占用808个片，频率可达288.35MHz。
Lattice based cryptography (LBC) is one of the most promising post-quantum cryptographic candidates. Ring-learning with errors (R-LWE) is an encryption scheme of LBC. In this paper, a lightweight hardware implementation is presented including key generation, encryption, and decryption. The R-LWE encryption scheme consists of a Gaussian sampler and polynomial multiplication. This paper uses cumulative distribution table (CDT) as the Gaussian sampler and schoolbook approach for the polynomial multiplication. The purpose of this architecture is to achieve small area consumption with high frequency. The hardware implementation results on the Xilinx Kintex-7 FPGA show that the design consumes 808 slices and the frequency can be up to 288.35MHz.