Design in hot-carrier reliability for high performance logic applications
Design in hot-carrier reliability for high performance logic applications
复制标题
高性能逻辑应用的热载流子可靠性设计
DOI：
10.1109/cicc.1998.695033
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发表时间：
1998
期刊：
影响因子：
--
通讯作者：
C. Hu
中科院分区：
文献类型：
--
作者：
P. Fang;J. Tao;Jone F. Chen;C. Hu
综述了静态（DC）和动态（AC）热载流子退化机理。电路性能退化与单个NMOS或PMOS器件在直流应力下的性能有关。还审查了交流退化模型校准和评估指南，以确保在电路级使用热载流子可靠性仿真工具。作为一个例子，千小时的反相器环形振荡器的速度退化数据与不同的扇出，应力电压，沟道长度，和工艺进行了比较，从可靠性仿真。结果表明，可靠性仿真是逻辑电路优化设计的有力工具。它可以准确地预测长期电路热载流子退化。对反相器、NAND和NOR结构的可靠性进行了仿真和比较。
Static (DC) and dynamic (AC) hot carrier degradation mechanisms were reviewed. Circuit performance degradation has been correlated to individual NMOS or PMOS device under DC stress. AC degradation model calibration and evaluation guidelines were also reviewed to ensure the use of hot-carrier reliability simulation tools at circuit level. As an example, thousand-hour inverter ring oscillator speed degradation data with different fanout, stress voltages, channel length, and processes are compared with that obtained from reliability simulation. The results show that reliability simulation is a powerful tool for logic circuit design optimization. It can predict the long-term circuit hot-carrier degradation accurately. The reliability of inverter, NAND, and NOR structures are also simulated and compared.