Heterogeneous System-Level Package Integration - Trends and Challenges

Heterogeneous System-Level Package Integration - Trends and Challenges
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异构系统级包集成 - 趋势和挑战

DOI:
10.1109/vlsitechnology18217.2020.9265085
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发表时间:
2020
期刊:
2020 IEEE Symposium on VLSI Technology
影响因子:
--
通讯作者:
S. Rusu
S. Rusu
中科院分区:
--
文献类型:
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作者:
Frank J. C. Lee;Mei Wong;J. Tzou;J. Yuan;Daniel Chang;S. Rusu

文献摘要

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异构封装级集成在用于通用计算、机器学习和移动的应用的更高功能密度和更低功率处理器中起着越来越重要的作用。本文将回顾2.5D和3D封装级集成的技术趋势和挑战,特别关注芯片分区、电气接口、功率传输、热建模和EDA流程的系统技术协同优化。
Heterogeneous package-level integration plays an increasing role in higher functional density and lower power processors for general computing, machine learning and mobile applications. This paper will review technology trends and challenges for 2.5D and 3D package-level integration with special focus on system-technology co-optimization of the die partitioning, electrical interfaces, power delivery, thermal modeling and EDA flows.