The Unreasonable Power of the Sum-Check Protocol
The Unreasonable Power of the Sum-Check Protocol
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和检查协议的不合理权力
DOI:
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发表时间:
2020
期刊:
影响因子:
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通讯作者:
L. Andriès
中科院分区:
文献类型:
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作者:
van der Ark;L. Andriès
When designing an efficient interactive proof system, there is only one hammer you need to have in your toolbox: the sum-check protocol of Lund, Fortnow, Karloff, and Nisan. The goal of this blog post is to describe this hammer and give a sense of why it is so useful. This entire post will be framed in the context of interactive proofs. This means that the goal is for a verifier V to offload an expensive computation to an untrusted prover P , while achieving work-saving for the verifier. We want the verifier to run in time linear in the input size, while keeping the proof short (logarithmic size) and the prover efficient. Since this post is appearing on the ZKProof blog, you may wonder why there is nothing said about zero-knowledge. The answer is that one can combine the ideas described in this post with cryptographic commitments to get state of the art zk-SNARKs. But that will be the subject of a future post. Roadmap for this post. After describing the sum-check protocol, I will demonstrate its remarkable power through several applications. First, I will give simple interactive proofs (IPs) for matrix multiplication and counting triangles in graphs. A cool thing about these IPs is that the prover is super-efficient: P runs the best-known algorithm to solve the problem, and then does a low-order amount of extra work to prove the answer is correct. I don’t know of any other techniques that achieve this super-efficiency with logarithmic proof length. Second, I will re-prove the following important result of Goldwasser, Kalai, and Rothblum (GKR): all problems solvable in logarithmic space have an IP with a linear-time verifier, polynomial time prover, and polylogarithmic proof length. As I’ll explain, this result is a direct consequence of the matrix-multiplication IP—this is simpler than the original treatment by GKR, who derived the result via a sophisticated IP for arithmetic circuit evaluation.