Electrostatically-Doped Hetero-Barrier Tunnel Field Effect Transistor: Design and Investigation
Electrostatically-Doped Hetero-Barrier Tunnel Field Effect Transistor: Design and Investigation
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DOI：
10.1109/access.2018.2876771
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发表时间：
2018
期刊：
影响因子：
3.9
通讯作者：
M. Ehteshamuddin;Abdullah G. Alharbi;S. Loan
中科院分区：
文献类型：
--
作者：
M. Ehteshamuddin;Abdullah G. Alharbi;S. Loan
本文模拟研究了一种基于阶跃禁带（Ⅲ型）的静电掺杂异质结势垒隧道场效应晶体管（ED-Het-TFET），并与传统掺杂的阶跃禁带异质结势垒TFET（Het-TFET）进行了比较。ED-Het-TFET采用GaSb源极区、In 0. 85 Ga 0. 15 As基沟道-漏极区和In 0. 2Ga 0. 8As作为隧道势垒，具有均匀的p型掺杂，最初在整个器件层中进行。采用两种具有适当功函数的金属栅（c-gate和n-gate）反转In0.85Ga0.15As层中的掺杂以实现n型沟道-漏区。一个2-D校准的模拟表明，在关态电流和$I_{\text {ON}}/I_{\text {OFF}}$比的改善。ED-Het-TFET中的关态电流已经提高了一个数量级以上。此外，瞬态分析表明，ED-Het-TFET在电路级实现期间的上升传播延迟方面与其常规对应物表现相当。在20纳米栅极长度下，在0.1 V的极低工作电压下获得了~ 108的高$I_{\text {ON}}/I_{\text {OFF}}$比（平均亚阈值斜率为~11 mV/十倍），使其成为未来超低功耗应用的器件。
In this paper, an electrostatically-doped hetero-barrier tunnel-field-effect-transistor (ED-Het-TFET) based on stepped broken-gap (type-III) is simulated, investigated, and compared with the conventionally-doped stepped broken-gap hetero-barrier TFET (Het-TFET). ED-Het-TFET employs GaSb source region, In0.85Ga0.15As-based channel-drain regions, and In0.2Ga0.8As as tunnel barrier, with a uniform p-type doping, done initially throughout the device layer. Two metal gates (c-gate and n-gate) with proper workfunctions are used to invert the doping in In0.85Ga0.15As layer to realize n-type channel-drain regions. A 2-D calibrated simulations have shown improvement in the OFF-state current and the $I_{\text {ON}}/I_{\text {OFF}}$ ratio. OFF-state current in the ED-Het-TFET has improved by more than an order of magnitude. Furthermore, transient analysis reveals that ED-Het-TFET performs on par with its conventional counterpart in terms of rise propagation delay during circuit level implementation. A high $I_{\text {ON}}/I_{\text {OFF}}$ ratio of ~ 108 (average subthreshold slope of ~11 mV/decade) is obtained at 20-nm gate length for a very low operating voltage of 0.1 V, enabling it to be a device for future ultra-low power applications.