An FBAR Driven −261dB FOM Fractional-N PLL

An FBAR Driven −261dB FOM Fractional-N PLL
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FBAR 驱动的 −261dB FOM 小数 N PLL

DOI:
10.1109/rfic51843.2021.9490409
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发表时间:
2021
期刊:
2021 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)
影响因子:
--
通讯作者:
R. Parker
R. Parker
中科院分区:
--
文献类型:
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作者:
Dihang Yang;D. Murphy;H. Darabi;A. Behzad;R. Ruby;R. Parker

文献摘要

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提出了一种1mW−261dB抖动91fs的FOM锁相环,该锁相环结合了低噪声、高频FBAR参考和单位增益混频(HM)锁相环,以最小化参考噪声增益,并完全避免了sigma-delta调制器量化噪声和分数杂散的放大,从而允许更大的环路带宽来抑制VCO噪声和速度沉降。
A 1mW −261dB FOM PLL with 91fs jitter is presented that combines a low-noise, high-frequency FBAR reference with the unity-gain harmonic-mixing (HM) PLL to minimize reference noise gain and avoid entirely the amplification of sigma-delta modulator quantization noise and fractional spurs, which, in turn, allows for a substantially larger loop bandwidth to suppress the VCO noise and speed settling.