Optimization of the Porous-Silicon-Based Superjunction Power MOSFET
Optimization of the Porous-Silicon-Based Superjunction Power MOSFET
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DOI：
10.1109/ted.2008.926280
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发表时间：
2008-07
影响因子：
3.1
通讯作者：
Hua Ye;P. Haldar
中科院分区：
文献类型：
--
作者：
Hua Ye;P. Haldar
本文讨论了基于多孔硅形成工艺的高压超结功率MOSFET的优化设计。在该制造过程中，通过直接在薄硅晶片上蚀刻结构化大孔，然后钝化壁并用带相反电荷的多晶硅填充孔来产生电荷补偿结构。的电荷不平衡和钝化层的厚度的影响进行了研究，基于物理的数值器件模拟。结果表明，即使在少量的电荷不平衡的情况下，该方法仍然可以生产出性能比现有技术好得多的高压MOSFET。当p和n列中的掺杂浓度较低时，发现p和n列之间的厚氧化物层有助于减轻结型场效应晶体管效应。与传统的SJ结构相比，发现在p和n柱之间包含氧化物层有助于提高器件效率，此外还有助于防止掺杂剂相互扩散。
This paper discusses the optimization of a high-voltage superjunction (SJ) power MOSFET by the use of fabrication based on porous-silicon formation. In this fabrication process, the charge-compensating structures are created by etching the structured macropores directly on a thin silicon wafer, followed by passivating the walls and filling the pores with oppositely charged polysilicon. The effects of charge imbalance and the thickness of the passivation layer are studied by physically based numerical-device simulations. It is found that, even with small amount of charge imbalance, the proposed method can still produce high-voltage MOSFETs with much better performance than existing technology. A thick oxide layer between the p and n columns is found to be helpful in alleviating the junction field-effect transistor effects when the doping concentrations in the p and n columns are low. In comparison with a conventional SJ structure, the inclusion of an oxide layer between the p and n columns is found to help increase the device efficiency in addition to its ability to prevent dopant interdiffusion.