True North: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip
True North: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip
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DOI：
10.1109/tcad.2015.2474396
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发表时间：
2015-10-01
影响因子：
2.9
通讯作者：
Modha, Dharmendra S.
中科院分区：
文献类型：
--
作者：
Akopyan, Filipp;Sawada, Jun;Modha, Dharmendra S.
认知计算的新时代带来了开发能够处理大量嘈杂多感官数据的系统的巨大挑战。这种类型的智能计算提出了一系列限制，包括实时操作、低功耗和可扩展性，需要与传统的系统设计彻底不同。类脑架构在这一领域提供了巨大的前景。为此，我们开发了 TrueNorth，这是一款 65 mW 实时神经突触处理器，它实现了非冯诺依曼、低功耗、高度并行、可扩展和容错架构。 TrueNorth 芯片拥有 4096 个神经突触核心，包含 100 万个数字神经元和 2.56 亿个突触，通过事件驱动的路由基础设施紧密互连。全数字化的 54 亿晶体管实现利用了现有的 CMOS 缩放趋势，同时确保硬件和软件之间的一一对应。凭借如此激进的设计指标以及 TrueNorth 架构与主流架构的突破，传统的计算机辅助设计 (CAD) 工具显然无法用于设计。因此，我们开发了一种新颖的设计方法，其中包括混合异步-同步电路和用于构建事件驱动的低功耗神经突触芯片的完整工具流程。 TrueNorth 芯片在连接和神经参数方面是完全可配置的，允许为各种认知和感官感知应用进行自定义配置。为了减少系统的通信能量，我们采用了现有的与应用无关的超大规模集成 CAD 放置工具，用于将逻辑神经网络映射到 TrueNorth 芯片上的物理神经突触核心位置。至此，我们成功演示了基于 TrueNorth 的系统在多种应用中的使用，包括视觉对象识别，与在冯·诺依曼架构上运行的相同算法相比，具有更高的性能和低几个数量级的功耗。 TrueNorth 芯片及其工具流程可作为未来认知系统的构建模块，使设计人员有机会根据本文获得的知识开发新颖的受大脑启发的架构和系统。
The new era of cognitive computing brings forth the grand challenge of developing systems capable of processing massive amounts of noisy multisensory data. This type of intelligent computing poses a set of constraints, including real-time operation, low-power consumption and scalability, which require a radical departure from conventional system design. Brain-inspired architectures offer tremendous promise in this area. To this end, we developed TrueNorth, a 65 mW real-time neurosynaptic processor that implements a non-von Neumann, low-power, highly-parallel, scalable, and defect-tolerant architecture. With 4096 neurosynaptic cores, the TrueNorth chip contains 1 million digital neurons and 256 million synapses tightly interconnected by an event-driven routing infrastructure. The fully digital 5.4 billion transistor implementation leverages existing CMOS scaling trends, while ensuring one-to-one correspondence between hardware and software. With such aggressive design metrics and the TrueNorth architecture breaking path with prevailing architectures, it is clear that conventional computer-aided design (CAD) tools could not be used for the design. As a result, we developed a novel design methodology that includes mixed asynchronous-synchronous circuits and a complete tool flow for building an event-driven, low-power neurosynaptic chip. The TrueNorth chip is fully configurable in terms of connectivity and neural parameters to allow custom configurations for a wide range of cognitive and sensory perception applications. To reduce the system's communication energy, we have adapted existing application-agnostic very large-scale integration CAD placement tools for mapping logical neural networks to the physical neurosynaptic core locations on the TrueNorth chips. With that, we have successfully demonstrated the use of TrueNorth-based systems in multiple applications, including visual object recognition, with higher performance and orders of magnitude lower power consumption than the same algorithms run on von Neumann architectures. The TrueNorth chip and its tool flow serve as building blocks for future cognitive systems, and give designers an opportunity to develop novel brain-inspired architectures and systems based on the knowledge obtained from this paper.