Threshold-voltage balance for minimum supply operation [LV CMOS chips]
Threshold-voltage balance for minimum supply operation [LV CMOS chips]
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最小电源运行的阈值电压平衡 [LV CMOS 芯片]
DOI：
10.1109/jssc.2003.810043
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发表时间：
2003
期刊：
影响因子：
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通讯作者：
M. Miyazaki
中科院分区：
文献类型：
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作者：
G. Ono;M. Miyazaki
pMOS和nMOS晶体管的阈值电压V/sub t/之间的差异是CMOS电路的低电压操作中的关键问题。从亚阈值漏电流、CMOS LSI的性能和逻辑电路的最小电源电压等方面分析了pMOS/nMOS V/sub t/平衡的优点。匹配的pMOS/nMOS V/sub t/提高了LSI的性能，并降低了0.15 V的最低电源电压。我们提出了一种新的体偏置管理的概念，使用正向偏置，波动补偿，V/sub t/匹配技术来解决这个问题。
The difference between the threshold voltages V/sub t/ of pMOS and nMOS transistors is a critical issue in the low-voltage operation of CMOS circuits. The pMOS/nMOS V/sub t/ balancing profit is analyzed in terms of subthreshold leakage current and the performance of CMOS LSIs and the minimum supply voltage of logic circuits. Matching the pMOS/nMOS V/sub t/ improves LSI performance and reduces the lowest supply voltage by 0.15 V. We propose a new concept of body bias management that uses forward biasing, fluctuation compensating, and V/sub t/ matching technologies to resolve the issue.