Hardware Architecture of Reinforcement Learning Scheme for Dynamic Power Management in Embedded Systems
Hardware Architecture of Reinforcement Learning Scheme for Dynamic Power Management in Embedded Systems
复制标题
嵌入式系统动态电源管理强化学习方案的硬件架构
DOI：
--
复制
发表时间：
2007
影响因子：
--
通讯作者：
E. C. Monie
中科院分区：
文献类型：
--
作者：
V. Prabha;E. C. Monie
动态电源管理（DPM）是一种通过选择性关闭空闲元件来降低电子系统功耗的技术。本文采用传统强化学习（RL）的一种新颖且非平凡的增强方法，从现有的DPM策略中选择最优策略。本文提出了一种由时间差分RL算法的VHDL模型演变而来的硬件架构，该架构可以针对任何给定的工作负载提出采用赢家策略以实现节能。事件驱动模拟器也证明了这种方法的有效性，该模拟器是使用JAVA为电源可管理的嵌入式设备设计的。结果表明，RL应用于DPM可以节省28%的电力。
Dynamic power management (DPM) is a technique to reduce power consumption of electronic systems by selectively shutting down idle components. In this paper, a novel and nontrivial enhancement of conventional reinforcement learning (RL) is adopted to choose the optimal policy out of the existing DPM policies. A hardware architecture evolved from the VHDL model of Temporal Difference RL algorithm is proposed in this paper, which can suggest the winner policy to be adopted for any given workload to achieve power savings. The effectiveness of this approach is also demonstrated by an event-driven simulator, which is designed using JAVA for power-manageable embedded devices. The results show that RL applied to DPM can lead up to 28% power savings.