Fault Detection Structures of the S-boxes and the Inverse S-boxes for the Advanced Encryption Standard
Fault Detection Structures of the S-boxes and the Inverse S-boxes for the Advanced Encryption Standard
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DOI：
10.1007/s10836-009-5108-4
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发表时间：
2009-08
期刊：
影响因子：
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通讯作者：
Mehran Mozaffari Kermani;A. Reyhani-Masoleh
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文献类型：
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作者：
Mehran Mozaffari Kermani;A. Reyhani-Masoleh
高级加密标准的故障检测方案旨在检测其硬件实现中的内部故障和恶意故障。在本文中，我们提出了s盒和逆s盒的故障检测结构，用于设计高级加密标准的高性能架构。我们避免使用查找表来实现s盒和逆s盒及其奇偶性预测。相反，使用基于组合字段的逻辑门实现。我们修改了这些结构，并提出了新的s盒和逆s盒的故障检测方案。利用预测奇偶校验位的封闭公式，对所提出的s盒和逆s盒的故障检测结构进行了仿真，结果表明所提出的方案可以检测到所有的单故障和几乎所有的随机多故障。我们还利用0.18μCMOS技术合成了改进的s盒、逆s盒、混合s盒/逆s盒结构和整个AES加密，并获得了它们的故障检测方案的面积、延迟和功耗开销。在此基础上，将故障覆盖率、空间复杂度和时延开销与已有的方法进行了比较。
Fault detection schemes for the Advanced Encryption Standard are aimed at detecting the internal and malicious faults in its hardware implementations. In this paper, we present fault detection structures of the S-boxes and the inverse S-boxes for designing high performance architectures of the Advanced Encryption Standard. We avoid utilizing the look-up tables for implementing the S-boxes and the inverse S-boxes and their parity predictions. Instead, logic gate implementations based on composite fields are used. We modify these structures and suggest new fault detection schemes for the S-boxes and the inverse S-boxes. Using the closed formulations for the predicted parity bits, the proposed fault detection structures of the S-boxes and the inverse S-boxes are simulated and it is shown that the proposed schemes detect all single faults and almost all random multiple faults. We have also synthesized the modified S-boxes, inverse S-boxes, mixed S-box/inverse S-box structures, and the whole AES encryption using the 0.18μCMOS technology and have obtained the area, delay, and power consumption overheads for their fault detection schemes. Furthermore, the fault coverage and the overheads in terms of the space complexity and time delay are compared to those of the previously reported ones.