10.5 A three-level single-inductor triple-output converter with an adjustable flying-capacitor technique for low output ripple and fast transient response
10.5 A three-level single-inductor triple-output converter with an adjustable flying-capacitor technique for low output ripple and fast transient response
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10.5 三电平单电感器三输出转换器，采用可调节快速电容器技术，可实现低输出纹波和快速瞬态响应
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发表时间：
2017
期刊：
影响因子：
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通讯作者：
Tsung
中科院分区：
文献类型：
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作者：
Li;Wen;Xiao;Yan;Ke;Chinder Wey;Ying;Shian;Tsung
低于28nm的CMOS设备允许在此类设备中使用较高的输入电压的供应电压，具有三级技术的堆叠MOSFET结构通常使用。 1显示了三级单电感器三重输出（SITO）转换器，还将瞬态响应与SITO进行比较没有三级技术的转换器。 /2vin和VSS当占空比（d <0.5）和1/2vin和VIN之间（否则）（d> 0.5）。拓扑是如何平衡十字架一般而言，飞行电容器CFLE的电压总体上，恢复的输出电压纹波和平整诱导的电流（IL）斜率分别导致短暂响应和严重的交叉调节（CR）问题图10.5.1表明，三级SITO转换器以稳定状态达到较小的输出电压纹波，但会导致较慢的瞬时响应时间，更长的恢复时间，较大的过冲/不足的速度和严重的CR。
Advanced CMOS devices below 28nm allow supply voltages lower than 1V. For applications with higher input voltage in such devices, stacked MOSFET structures with a three-level technology are commonly employed. The stacked structure can also reduce the output voltage ripple substantially. Figure 10.5.1 shows a three-level single-inductor triple-output (SITO) converter and also compares the transient response with the SITO converter without the three-level technique. The three-level topology applies three different voltages, Vin, 1/2Vin, and VSS, to the node VX. The operation mode is determined by the duty cycle, i.e., the node Vx swings between 1/2Vin and VSS when duty cycle (D < 0.5), and between 1/2Vin and Vin, otherwise (D>0.5). In state-of-the-art [1–3], the key issue of the three-level topology is how to balance the cross voltage of flying capacitor CFLY at the point of 1/2Vin. In general, the restrained output voltage ripple and the flatter inductor current (IL) slope seriously result in worse transient response and severe cross-regulation (CR) problems, respectively. Results in Figure 10.5.1 show that the three-level SITO converter achieves a smaller output voltage ripple in steady state, but it causes the problems of slower transient response time, longer recovery time, larger overshoot/undershoot, and severe CR. Thus, it is desired to develop a technique that can adjust the cross voltage of CFLY such that the three-level topology achieves higher efficiency, lower output voltage ripple, and fast transient response simultaneously.