A 200-µV/e- CMOS Image Sensor With 100-ke- Full Well Capacity

A 200-µV/e- CMOS Image Sensor With 100-ke- Full Well Capacity
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DOI:
10.1109/jssc.2008.917549
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发表时间:
2008-03
期刊:
IEEE J. Solid State Circuits
影响因子:
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通讯作者:
S. Adachi;Woonghee Lee;N. Akahane;H. Oshikubo;K. Mizobuchi;S. Sugawa
S. Adachi;Woonghee Lee;N. Akahane;H. Oshikubo;K. Mizobuchi;S. Sugawa
中科院分区:
其他
文献类型:
--
作者:
S. Adachi;Woonghee Lee;N. Akahane;H. Oshikubo;K. Mizobuchi;S. Sugawa

文献摘要

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通过引入具有通过MOS开关连接到横向溢出积分电容器(LOFIC)的小浮动扩散(FD)电容的新像素,已经开发了保持高全阱容量的高灵敏度CMOS图像传感器。小FD的方法比传统的列放大器的方法的概念优势进行了比较和证明。为了确保高灵敏度和高满阱容量,在S1/S2切换点处输出和再现低光和亮光信号(S1和S2)而没有可见的SNR降级。作为最关键的问题,在这种方法中的转换增益变化的增加被抑制通过应用自对准偏移结构的小FD。一个1/4英寸VGA格式的CMOS图像传感器,通过0.18妈妈2 P3 M工艺制造,达到2.2-e-rms的噪声基底与200-muV/e-转换增益和100-ke-全阱容量。
A high-sensitivity CMOS image sensor keeping a high full-well capacity has been developed by introducing a new pixel having a small floating diffusion (FD) capacitance connected to a lateral overflow integration capacitor (LOFIC) through a MOS switch. The conceptual advantage of the small FD approach over conventional column amplifier approaches is compared and demonstrated. To ensure both the high sensitivity and the high full-well capacity, the low-light and the bright-light signals (S1 and S2) are output and reproduced without a visible SNR degradation at the S1/S2 switching point. As the most critical problem, the increase of the conversion gain variation in this approach is suppressed by applying a self-aligned offset structure to the small FD. A 1/4-in VGA format CMOS image sensor fabricated through 0.18-mum 2P3M process achieves 2.2-e- rms noise floor with 200-muV/e- conversion gain and 100-ke- full-well capacity.