Characterizing emerging heterogeneous memory
Characterizing emerging heterogeneous memory
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DOI：
10.1145/2926697.2926702
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发表时间：
2016-06
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影响因子：
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通讯作者：
Du Shen;Xu Liu;F. Lin
中科院分区：
文献类型：
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作者：
Du Shen;Xu Liu;F. Lin
异质记忆（HM，也称为混合记忆）在新兴的平行体系结构中由于其编程灵活性和能源效率而变得流行，HM通常由快速和慢的组成部分组成。这为计划放置的程序员和编译器提供了额外的burnens。重要的是要了解如何利用HM并将预期设置为先前工作的好处。 ti Keystone II - 我们首先要进行三个贡献。凭借在实际HM体系结构上起作用的OpenMP 4.0 ，我们将数据放置优化应用于我们的基准测试，并评估HM在提高性能和节省能源方面的有效性。
Heterogeneous memory (HM, also known as hybrid memory) has become popular in emerging parallel architectures due to its programming flexibility and energy efficiency. Unlike the traditional memory subsystem, HM consists of fast and slow components. Usually, the fast memory lacks hardware support, which puts extra burdens on programmers and compilers for explicit data placement. Thus, HM provides both opportunities and challenges with programming parallel codes. It is important to understand how to utilize HM and set expectations on the benefits of HM. Prior work principally uses simulators to study HM, which lacks the analysis on a real hardware. To address this issue, this paper experiments with a real system—the TI KeyStone II—to study HM. We make three contributions. First, we develop a set of parallel benchmarks to characterize the performance and power efficiency of HM. It is the first benchmark suite with OpenMP 4.0 features that is functional on real HM architectures. Second, we build a profiling tool to provide guidance for placing data in HM. Our tool analyzes memory access patterns and provides high-level feedback at the source-code level for optimization. Third, we apply the data placement optimization to our benchmarks and evaluate the effectiveness of HM in boosting performance and saving energy.