A novel 600V-LDMOS with HV-interconnection for HVIC on thick SOI
A novel 600V-LDMOS with HV-interconnection for HVIC on thick SOI
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发表时间：
2010-06
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通讯作者：
M. Yamaji;Keisei Abe;Takeshi Maiguma;H. Takahashi;H. Sumida
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作者：
M. Yamaji;Keisei Abe;Takeshi Maiguma;H. Takahashi;H. Sumida
提出了一种用于厚SOI上600 V-HVIC的高压互连LDMOS结构。拟议结构中有两个要点。一种是在HV互连下形成双浮置p层，以防止HV互连干扰漂移区的电位分布;另一种是LDMOS结构与多沟槽隔离的良好结合，以获得600 V以上的隔离性能。从所提出的结构的LDMOS的高阻断能力，包括关闭和打开击穿电压超过600 V和高的热载流子不稳定性，和隔离性能超过1200 V，可以成功地获得。本文将详细介绍数值和实验结果。
A novel LDMOS structure with the HV-interconnection for a 600V-HVIC on thick SOI is proposed. There are two original points in the proposed structure. One is the formation of the double floating p-layers under the HV-interconnection to prevent potential distribution in the drift from disturbing due to the HV-interconnection, and the other is a good combination between the LDMOS structure and multiple trench isolation to obtain the isolation performance over 600V. From the proposed structure the high blocking capability of the LDMOS, including both off- and on-breakdown voltages over 600V and high hot carrier instability, and the isolation performance over 1200V can be obtained successfully. This paper will show numerical and experimental results in detail.