Reliable Hardware Architectures for Cryptographic Block Ciphers LED and HIGHT
Reliable Hardware Architectures for Cryptographic Block Ciphers LED and HIGHT
复制标题
适用于加密分组密码 LED 和 HIGHT 的可靠硬件架构
DOI:
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发表时间:
2017
影响因子:
2.9
通讯作者:
Mehrdad Nojoumian
中科院分区:
文献类型:
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作者:
S. Subramanian;Mehran Mozaffari;R. Azarderakhsh;Mehrdad Nojoumian
Cryptographic architectures provide different security properties to sensitive usage models. However, unless reliability of architectures is guaranteed, such security properties can be undermined through natural or malicious faults. In this paper, two underlying block ciphers which can be used in authenticated encryption algorithms are considered, i.e., light encryption device and high security and lightweight block ciphers. The former is of the Advanced Encryption Standard type and has been considered area-efficient, while the latter constitutes a Feistel network structure and is suitable for low-complexity and low-power embedded security applications. In this paper, we propose efficient error detection architectures including variants of recomputing with encoded operands and signature-based schemes to detect both transient and permanent faults. Authenticated encryption is applied in cryptography to provide confidentiality, integrity, and authenticity simultaneously to the message sent in a communication channel. In this paper, we show that the proposed schemes are applicable to the case study of simple lightweight CFB for providing authenticated encryption with associated data. The error simulations are performed using Xilinx Integrated Synthesis Environment tool and the results are benchmarked for the Xilinx FPGA family Virtex-7 to assess the reliability capability and efficiency of the proposed architectures.