Globally asynchronous locally synchronous wrapper circuit based on clock gating

Globally asynchronous locally synchronous wrapper circuit based on clock gating
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基于时钟门控的全局异步本地同步包装电路

DOI:
10.1109/isvlsi.2006.48
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发表时间:
2006
期刊:
IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI'06)
影响因子:
--
通讯作者:
H. Pedram
H. Pedram
中科院分区:
--
文献类型:
--
作者:
E. Amini;M. Najibi;H. Pedram

文献摘要

被引文献

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在本文中,我们提出了一种异步包装器,具有新的异步通信端口控制器和用于本地同步模块的可靠时钟生成方案。这是通过利用 GALS 包装器内的时钟门控思想来实现的,这使得本地同步模块可以使用可靠且强大的片外时钟发生器。除了时钟鲁棒性之外,时钟发生器部分也变得完全同步。为了验证所提出的解决方案,我们在维特比错误检测和校正电路中采用了包装电路。综合结果表明,与暂停时钟 GALS 包装器相比,我们的 GALS 方法获得了 44%/spl sim/48% 的性能改进。
In this paper we propose an asynchronous wrapper with new asynchronous communication port controllers and reliable clock generation scheme for locally synchronous modules. This is achieved by utilizing clock gating idea within GALS wrappers which makes the use of reliable and robust off-chip clock generator possible for locally synchronous modules. In addition to clock robustness, the clock generator part becomes totally synchronous. To validate the proposed solution, we employed the wrapper circuit in Viterbi error detection and correction circuit. The synthesis results show that our GALS approach gains 44%/spl sim/48% performance improvement in contrast to pausible clock GALS wrappers.