Highly Scalable Near Memory Processing with Migrating Threads on the Emu System Architecture
Highly Scalable Near Memory Processing with Migrating Threads on the Emu System Architecture
复制标题
Emu 系统架构上具有迁移线程的高度可扩展近内存处理
DOI：
10.1109/ia3.2016.7
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发表时间：
2016
期刊：
影响因子：
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通讯作者：
Steve Stein
中科院分区：
文献类型：
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作者：
T. J. Dysart;P. Kogge;Martin M. Deneroff;Eric Bovell;Preston Briggs;J. Brockman;K. Jacobsen;Y. Juan;Shannon K. Kuntz;R. Lethin;Janice O. McMahon;Chandra Pawar;Martin Perrigo;Sarah Rucker;J. Ruttenberg;Max Ruttenberg;Steve Stein
越来越多的证据表明，当前的体系结构无法很好地处理缓存不友好的应用程序，例如稀疏数学操作，数据分析和图形算法。这部分归因于这些应用程序所证明的不规则内存访问模式以及如何处理远程内存访问。本文介绍了一个新的，高度可观的PGAS内存系统体系结构，其中迁移线程传播到他们访问的数据。详细讨论了使用FPGA实施的首次实现该体系结构的首次实现，可以详细讨论记忆能力和核心数量。将关键参数与当今各种系统（不同体系结构）进行的比较表明了潜在的优势。对几个有据可查的内核的性能的早期预测将这些优势转化为比较数字。该体系结构的未来实施可能会通过应用最新硅技术状态来扩大性能优势。
There is growing evidence that current architectures do not well handle cache-unfriendly applications such as sparse math operations, data analytics, and graph algorithms. This is due, in part, to the irregular memory access patterns demonstrated by these applications, and in how remote memory accesses are handled. This paper introduces a new, highly-scalable PGAS memory-centric system architecture where migrating threads travel to the data they access. Scaling both memory capacities and the number of cores can be largely invisible to the programmer.The first implementation of this architecture, implemented with FPGAs, is discussed in detail. A comparison of key parameters with a variety of today's systems, of differing architectures, indicates the potential advantages. Early projections of performance against several well-documented kernels translate these advantages into comparative numbers. Future implementations of this architecture may expand the performance advantages by the application of current state of the art silicon technology.