Test-Quality/Cost Optimization Using Output-Deviation-Based Reordering of Test Patterns
Test-Quality/Cost Optimization Using Output-Deviation-Based Reordering of Test Patterns
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DOI：
10.1109/tcad.2007.907228
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发表时间：
2008-02
影响因子：
2.9
通讯作者：
Zhanglei Wang;K. Chakrabarty
中科院分区：
文献类型：
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作者：
Zhanglei Wang;K. Chakrabarty
高速功能测试、延迟测试和n-检测测试装置如今被用于检测深亚微米缺陷。然而，由此产生的测试数据量太大; 2005年国际半导体路线图预测，到2010年，测试应用时间将比现在大30倍。此外，许多新类型的缺陷不能使用现有的故障模型准确地建模。因此，需要对测试模式的质量进行建模，以便可以快速评估它们以进行缺陷筛选。测试选择需要从大型测试集中选择最有效的模式序列。当前的测试选择的行业实践是基于故障分级，这是计算昂贵的，也必须重复每个故障模型。此外，尽管目前存在有效的方法，但对于面向故障的测试生成，缺乏对如何最好地联合收割机由此获得的测试集的理解，即，导出各个测试集的最有效的联合，而不是简单地采取每个故障模型的所有模式。本文提出了使用输出偏差作为替代覆盖度量模式建模和测试分级。一个灵活的，但一般的，概率故障模型被用来生成一个概率图的电路，随后可以用于测试模式重新排序。由概率图产生的输出偏差被用作覆盖度量来对测试模式进行建模;偏差越高，测试模式的质量越好。我们表明，对于ISCAS基准电路和其他重排序方法相比，所提出的方法提供了ldquosteeperrdquo覆盖曲线不同的故障模型。
At-speed functional testing, delay testing, and n-detection test sets are being used today to detect deep submicrometer defects. However, the resulting test data volumes are too high; the 2005 International Roadmap for Semiconductors predicts that test-application times will be 30 times larger in 2010 than they are today. In addition, many new types of defects cannot be accurately modeled using existing fault models. Therefore, there is a need to model the quality of test patterns such that they can be quickly assessed for defect screening. Test selection is required to choose the most effective pattern sequences from large test sets. Current industry practice for test selection is based on fault grading, which is computationally expensive and must also be repeated for every fault model. Moreover, although efficient methods exist today, for fault-oriented test generation, there is a lack of understanding on how best to combine the test sets thus obtained, i.e., derive the most effective union of the individual test sets without simply taking all the patterns for each fault model. This paper presents the use of the output deviation as a surrogate coverage-metric for pattern modeling and test grading. A flexible, but general, probabilistic-fault model is used to generate a probability map for the circuit, which can subsequently be used for test-pattern reordering. The output deviations resulting from the probability map(s) are used as a coverage-metric to model test patterns; the higher the deviation, the better the quality of the test pattern. We show that, for the ISCAS benchmark circuits and as compared to other reordering methods, the proposed method provides ldquosteeperrdquo coverage curves for different fault models.