PRISC: programmable reduced instruction set computers
PRISC: programmable reduced instruction set computers
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PRISC：可编程精简指令集计算机
DOI：
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发表时间：
1994
期刊：
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通讯作者：
R. Razdan
中科院分区：
文献类型：
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作者：
R. Razdan
本文将可编程的减少指令集（PRISC）作为新的通用计算机类别。 PRISC使用RISC技术作为基础，但是除了传统的RISC指令资源外，PRISC还提供可根据特定应用程序需求配置的硬件可编程资源。本文介绍了成功构建PRISC所需的体系结构，操作系统和编程语言编译技术。为PRISC的最简单形式提供了性能结果，即RISC微处理器，其一组可编程功能单元仅由组合函数组成。 SpecInt92基准套件的结果表明，增强编译器可以用硬件区域的投资比基础RISC计算机提供22％的性能提高，远小于2千位SRAM所需的硬件。此外，对源代码的主动操作会导致一般摘要数据类型（例如短矢量矢量，哈希表和有限状态机器）的本地性能提高（250％-500％）。使用这些数据类型的最终用户应用程序的结果表明，性能增长率为32％-213％。
This thesis introduces Programmable Reduced Instruction Set Computers (PRISC) as a new class of general-purpose computers. PRISC use RISC techniques as a base, but in addition to the conventional RISC instruction resources, PRISC offer hardware programmable resources which can be configured based on the needs of a particular application. This thesis presents the architecture, operating system, and programming language compilation techniques which are needed to successfully build PRISC. Performance results are provided for the simplest form of PRISC--a RISC microprocessor with a set of programmable functional units consisting of only combinational functions. Results for the SPECint92 benchmark suite indicate that an augmented compiler can provide a performance improvement of 22% over the underlying RISC computer with a hardware area investment less than that needed for a 2 kilobyte SRAM. In addition, active manipulation of the source code leads to significantly higher local performance gains (250%-500%) for general abstract data types such as short-set vectors, hash tables, and finite state machines. Results on end-user applications that utilize these data types indicate a performance gain from 32%-213%.