EigenEdge: Real-Time Software Execution at the Edge with RISC-V and Hardware Accelerators
EigenEdge: Real-Time Software Execution at the Edge with RISC-V and Hardware Accelerators
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DOI：
10.1145/3576914.3587510
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发表时间：
2023-05
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通讯作者：
Kuan-Lin Chiu;Guy Eichler;Biruk B. Seyoum;L. Carloni
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作者：
Kuan-Lin Chiu;Guy Eichler;Biruk B. Seyoum;L. Carloni
边缘实时计算领域的一个重要目标是在低延迟要求和严格的低功耗约束之间取得平衡。在这个等式中，我们希望将简单的应用程序编程接口(API)纳入软件开发和开放源码IP的利用中，以鼓励公共领域的可重用性。一大挑战是弥合API之间的差距，API简化复杂算法的实现，但主要依赖于以CPU为中心的计算范例，以及为边缘实时计算的约束而设计的轻量级异类硬件体系结构。我们介绍了一种硬件/软件协同设计方法，该方法结合了用Eigen设计的软件应用程序，Eigen是一个强大的开源C++库，它抽象了线性代数工作负载，并在不同的片上系统(SoC)架构上实时执行。我们使用ESP，这是一个开源的SoC设计平台，允许我们集成CVA6 RISC-V处理器和定制硬件加速器。通过基于现场可编程门阵列的实验，我们表明，我们的方法在保持高级软件开发提供的简单性的同时，提供了显著的性能和能效提升。
An important goal in the field of real-time computation at the edge is to achieve balance between low-latency requirements and strict low-power constraints. Into this equation, we would like to incorporate simple Application Programming Interfaces (APIs) for software development and utilization of open-source IPs that encourage reusability in the public domain. One big challenge is to bridge the gap between APIs that simplify the implementation of complex algorithms but mostly rely on CPU-centric computing paradigms, and lightweight heterogeneous hardware architectures designed for the constraints of real-time computation at the edge. We introduce a hardware/software co-design approach that combines software applications designed with Eigen, a powerful open-source C++ library that abstracts linear-algebra workloads, and real-time execution on heterogeneous System-on-Chip (SoC) architectures. We use ESP, an open-source SoC design platform that allows us to integrate the CVA6 RISC-V processor and custom hardware accelerators. With FPGA-based experiments, we show that our approach provides significant performance and energy efficiency gains, while maintaining the simplification provided by high-level software development.