Novel 10-T full adders realized by GDI structure

Novel 10-T full adders realized by GDI structure
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DOI:
10.1109/isicir.2007.4441810
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发表时间:
2007-09
期刊:
2007 International Symposium on Integrated Circuits
影响因子:
--
通讯作者:
Po-Ming Lee;Chia-Hao Hsu;Yun-Hsiun Hung
Po-Ming Lee;Chia-Hao Hsu;Yun-Hsiun Hung
中科院分区:
其他
文献类型:
--
作者:
Po-Ming Lee;Chia-Hao Hsu;Yun-Hsiun Hung

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A full adder is one of the most commonly used digit circuit components, many improvements have been made to refine the architecture of a full adder. In this paper, 4 different types of 10 transistor (10-T) based full adder are proposed using a new design methodology called GDI (gate-diffusion input). In the meantime, a complete verification and comparison is also carried out to test the performance of the proposed adders. According to our test results, one of the proposed 10-T full adders is better than the prior designs which makes it a better alternative.