An optimized compensation strategy for two-stage CMOS op amps
An optimized compensation strategy for two-stage CMOS op amps
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DOI:
10.1109/81.376869
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发表时间:
1995-03
影响因子:
5.1
通讯作者:
G. Palmisano;G. Palumbo
中科院分区:
文献类型:
--
作者:
G. Palmisano;G. Palumbo
An optimized compensation strategy for two-stage Miller-compensated CMOS operational amplifiers is presented. The output conductance of the buffer which avoids the right half-plane zero is profitably used to achieve a pole-zero compensation. Indeed, thanks to a proper choice of the buffer transconductance, the compensation for the pole due to the load capacitor is reached, thus providing better frequency performance. >