Partial online-synthesis for mixed-grained reconfigurable architectures

Partial online-synthesis for mixed-grained reconfigurable architectures
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混合粒度可重构架构的部分在线综合

DOI:
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发表时间:
2012
期刊:
Design, Automation and Test in Europe
影响因子:
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通讯作者:
J. Henkel
J. Henkel
中科院分区:
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文献类型:
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作者:
Artjom Grudnitsky;L. Bauer;J. Henkel

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具有细粒度可重构加速器 (FGRA) 的处理器架构可实现高度适应性,以满足不同的应用需求。当处理计算密集型内核时,可以使用多个 FGRA 来执行复杂的函数。为了利用细粒度可重新配置结构的适应性,运行时系统应根据应用程序需求决定何时以及哪些 FGRA 重新配置。 To enable this adaptivity, a flexible infrastructure is required that allows combining FGRAs to execute complex functions.我们提出了一种由连接 FGRA 的粗粒度可重构基础设施 (CGRI) 组成的混合粒度可重构架构。在运行时,我们根据运行时系统的决策合成 CGRI 配置,例如应重新配置哪些 FGRA。出于性能原因,FGRA 的综合和布局布线是在编译时完成的。结合起来,这导致了混合粒度可重构架构的部分在线综合,这允许在利用可重构结构固有的适应性的同时保持较低的运行时开销。在这项工作中,我们重点关注在运行时综合 CGRI 配置的关键部分,提出算法,并比较不同应用场景的性能/开销权衡。我们是第一个通过使用我们的部分在线合成来利用由 CGRI 连接的 FGRA 增强的适应性。 In comparison to a state-of-the-art reconfigurable architecture that synthesizes the configurations for the CGRI at compile time we obtain an average speedup of 1.79x.
Processor architectures with Fine-Grained Reconfigurable Accelerators (FGRAs) allow for a high degree of adaptivity to address varying application requirements. When processing computation intensive kernels, multiple FGRAs may be used to execute a complex function. In order to exploit the adaptivity of a fine-grained reconfigurable fabric, a runtime system should decide when and which FGRAs to reconfigure with respect to application requirements. To enable this adaptivity, a flexible infrastructure is required that allows combining FGRAs to execute complex functions. We propose a mixed-grained reconfigurable architecture composed from a Coarse-Grained Reconfigurable Infrastructure (CGRI) that connects the FGRAs. At runtime we synthesize CGRI configurations that depend on decisions of the runtime system, e.g. which FGRAs shall be reconfigured. Synthesis and place & route of the FGRAs are done at compile time for performance reasons. Combined, this results in a partial online synthesis for mixed grained reconfigurable architectures, which allows maintaining a low runtime overhead while exploiting the inherent adaptivity of the reconfigurable fabric. In this work we focus on the crucial parts of synthesizing the configurations for the CGRI at runtime, propose algorithms, and compare their performance/overhead trade-offs for different application scenarios. We are the first to exploit the increased adaptivity of FGRAs that are connected by a CGRI, by using our partial online synthesis. In comparison to a state-of-the-art reconfigurable architecture that synthesizes the configurations for the CGRI at compile time we obtain an average speedup of 1.79x.