Robust Intermediate Read-Out for Deep Submicron Technology CMOS Image Sensors
Robust Intermediate Read-Out for Deep Submicron Technology CMOS Image Sensors
复制标题
适用于深亚微米技术 CMOS 图像传感器的稳健中间读出
DOI：
10.1109/jsen.2007.912783
复制
发表时间：
2008
影响因子：
4.3
通讯作者：
A. Bermak
中科院分区：
文献类型：
--
作者：
Shoushun Chen;F. Boussaid;A. Bermak
本文提出了一种用于深亚微米工艺的新型尖峰像素设计和稳健的数字中间读出的CMOS图像传感器。建议的读出方案表现出对正在进行的电源电压的积极缩放相对不敏感。它基于一种新型紧凑的尖峰像素电路，该电路结合了数字化和存储功能。照明使用非常简单但健壮的格雷8位计数器存储器编码成格雷码。电路仿真和实验表明，采用0.35CMOS工艺实现的图像传感器工作成功。给出了可伸缩性分析。这表明，深度低于0.18将使所提出的Gray编码尖峰像素的潜力得到充分发挥。潜在的应用包括多分辨率成像和运动检测。
In this paper, a CMOS image sensor featuring a novel spiking pixel design and a robust digital intermediate read-out is proposed for deep submicron CMOS technologies. The proposed read-out scheme exhibits a relative insensitivity to the ongoing aggressive scaling of the supply voltage. It is based on a novel compact spiking pixel circuit, which combines digitizing and memory functions. Illumination is encoded into a Gray code using a very simple yet robust Gray 8-bit counter memory. Circuit simulations and experiments demonstrate the successful operation of a 64 64 image sensor, implemented in a 0.35 CMOS technology. A scalability analysis is presented. It suggests that deep sub-0.18 will enable the full potential of the proposed Gray encoding spiking pixel. Potential applications include multiresolution imaging and motion detection.