Built-In Proactive Tuning System for Circuit Aging Resilience

Built-In Proactive Tuning System for Circuit Aging Resilience
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内置主动调谐系统,可提高电路抗老化能力

DOI:
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发表时间:
2008
期刊:
2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems
影响因子:
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通讯作者:
Duncan Walker
Duncan Walker
中科院分区:
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文献类型:
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作者:
N. Shah;Rupak Samanta;Ming Zhang;Jiang Hu;Duncan Walker

文献摘要

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VLSI电路中的VLSI技术中VLSI技术的衰老效果显着,这是由于在操作时间内的性能降解所体现的。尽管这种降解可以通过过度设计来补偿,但它诱导了显着的电源开销,这在紧密的功率约束设计中是不可取的。动态电压缩放(DVS)是一种更强大的方法。但是,其粗粒度意味着难以处理衰老效应的细粒变化。我们提出了一个内置的主动调整(BIPT)系统,该系统允许每个电路块根据其自身的衰老程度自主对其性能自动调整的性能。通过在基准电路上的香料模拟和NBTI效应的情况下,通过香料模拟来验证BIPT系统。实验结果表明,所提出的BIPT系统的功率比过度设计的方法低约45%,同时保持相同的性能。与DVS相比,BIPT可以达到相同的衰老弹性,而功率耗散约为30%。
VLSI circuits in nanometer VLSI technology experience significant aging effects, which are embodied by performance degradation over operation time. Although this degradation can be compensated by over-design, it induces remarkable power overhead which is undesirable in tightly power-constrained designs. Dynamic voltage scaling (DVS) is a more power-efficient approach. However, its coarse granularity implies difficulty in handling fine-grained variations in the aging effects. We propose a Built-In Proactive Tuning (BIPT) system that allows each circuit block to autonomously tune its performance according to its own degree of aging. The BIPT system is validated through SPICE simulations on benchmark circuits with consideration of NBTI effect. The experimental results indicate that the proposed BIPT system leads to about 45% less power than the approach of over-design while maintaining the same performance. Compared to DVS, BIPT can achieve the same aging resilience with about 30% less power dissipation.