New RF extrinsic resistances extraction procedure for deep‐submicron MOS transistors
New RF extrinsic resistances extraction procedure for deep‐submicron MOS transistors
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DOI：
10.1002/jnm.726
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通讯作者：
J. Tinoco;J. Raskin
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作者：
J. Tinoco;J. Raskin
用于射频应用的MOS晶体管的建模需要定义集总等效电路，在该电路中，内部器件和串联非本征电阻被适当地评估。模型的精度取决于每个本征集总元素的提取精度。为了确定器件的本征行为，必须首先去除串联的外阻。因此，它们的提取对于射频电路设计中MOS晶体管的建模至关重要。虽然已经提出了几种提取方法，但测量噪声对提取结果的影响很大。Bracale等人提出的方法是对测量噪声最稳健的提取方法，但不能正确地预测深亚微米器件的串联非本征电阻。基于这些原因，我们对Bracale提出的方法进行了深入的分析，以期理解并克服其局限性。在此基础上，提出了一种适用于深亚微米器件的稳健提取方法。版权所有©2009 John Wiley&Sons，Ltd.
The modeling of MOS transistors used for RF applications needs the definition of a lumped equivalent circuit where the intrinsic device and series extrinsic resistances are properly evaluated. The model accuracy depends on the extraction precision of each intrinsic lumped element. In order to determine the intrinsic device behavior, it is necessary to first remove the series extrinsic resistances. For this reason their extraction becomes critical for the modeling of MOS transistors in RF circuit design. Several extraction methods have been proposed; nevertheless, the measurement noise strongly affects the obtained results. The method proposed by Bracale and co‐workers is the most robust extraction procedure against measurement noise, but fails to predict correctly the series extrinsic resistances for deep‐submicron devices. For those reasons, we deeply analyze the method proposed by Bracale in order to understand and then overcome its limitations. Based on those analyses, a robust extraction method for deep‐submicron devices is proposed. Copyright © 2009 John Wiley & Sons, Ltd.