Cross-ISA machine instrumentation using fast and scalable dynamic binary translation
Cross-ISA machine instrumentation using fast and scalable dynamic binary translation
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DOI：
10.1145/3313808.3313811
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发表时间：
2019-04
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通讯作者：
E. G. Cota;L. Carloni
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文献类型：
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作者：
E. G. Cota;L. Carloni
教学集架构（ISA）多样性的上升和虚拟机的越来越多的采用促进了对快速，可扩展，全系统，跨ISA仿真和仪器工具的需求。由于动态二进制翻译（DBT）的挑战性，在本文中，我们通过观察三个新技术来改善跨系统模拟器的复杂性。大多数FP操作都可以通过使用最少的非FP代码的主机FP单元来正确模拟。当他们以高速率平行地产生翻译代码时我们的方法是基于QEMU的高性能交叉机器模拟器和仪器工具在Spec06上表明，对于整数/fp工作负载，QELT（1）以1.76×/2.18×的优于1.76×/2.18×的QEMU，（2）优于最先进的，cross-isa，full-isa，全部 - 当用于复杂的仪器（例如高速缓存模拟）时，系统仪器工具的1.5×-3×和（3）可以匹配PIN的性能，即最先进的相同ISA DBI工具。
The rise in instruction set architecture (ISA) diversity and the growing adoption of virtual machines are driving a need for fast, scalable, full-system, cross-ISA emulation and instrumentation tools. Unfortunately, achieving high performance for these cross-ISA tools is challenging due to dynamic binary translation (DBT) overhead and the complexity of instrumenting full-system emulators. In this paper we improve cross-ISA emulation and instrumentation performance through three novel techniques. First, we increase floating point (FP) emulation performance by observing that most FP operations can be correctly emulated by surrounding the use of the host FP unit with a minimal amount of non-FP code. Second, we introduce the design of a translator with a shared code cache that scales for multi-core guests, even when they generate translated code in parallel at a high rate. Third, we present an ISA-agnostic instrumentation layer that can instrument guest operations that occur outside of the DBT’s intermediate representation (IR), which are common in full-system emulators. We implement our approach in Qelt, a high-performance cross-ISA machine emulator and instrumentation tool based on QEMU. Our results show that Qelt scales to 32 cores when emulating a guest machine used for parallel compilation, which demonstrates scalable code translation. Furthermore, experiments based on SPEC06 show that Qelt (1) outperforms QEMU as a full-system cross-ISA machine emulator by 1.76×/2.18× for integer/FP workloads, (2) outperforms state-of-the-art, cross-ISA, full-system instrumentation tools by 1.5×-3×, and (3) can match the performance of Pin, a state-of-the-art, same-ISA DBI tool, when used for complex instrumentation such as cache simulation.