A thermal van der Pauw test structure

A thermal van der Pauw test structure
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热范德堡测试结构

DOI:
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发表时间:
1999
期刊:
ICMTS 1999. Proceedings of 1999 International Conference on Microelectronic Test Structures (Cat. No.99CH36307)
影响因子:
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通讯作者:
H. Baltes
H. Baltes
中科院分区:
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文献类型:
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作者:
O. Paul;L. Plattner;H. Baltes

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报道了一种微加工热范德堡测试结构。它在原理上与传统的电学范德堡希腊十字测试结构相似,能够确定薄膜的面内热导率。利用了薄膜样品中的二维热流与薄膜导体中的电流模式之间的相似性。从一种商用CMOS专用集成电路工艺的电介质层的完整夹层中提取出了1.87×10⁵ K/W的热薄层电阻。这相当于CMOS电介质层夹层的平均面内热导率为κ = 1.44 Wm⁻¹K⁻¹。
A micromachined thermal van der Pauw test structure is reported. Similar in principle to the conventional electrical van der Pauw Greek cross test structures, it enables the in-plane thermal sheet conductivities of thin films to be determined. The analogy between the two-dimensional heat flow in thin film samples and the electrical current pattern in thin film conductors is exploited. A thermal sheet resistance of 1.87/spl times/10/sup 5/ K/W was extracted from the complete sandwich of dielectric layers of a commercial CMOS ASIC process. This is equivalent to an average in-plane thermal conductivity of the CMOS dielectric layer sandwich of /spl kappa/=1.44 Wm/sup -1/ K/sup -1/.