Fabrication of field-effect transistors with transfer-free nanostructured carbon as the semiconducting channel material

Fabrication of field-effect transistors with transfer-free nanostructured carbon as the semiconducting channel material
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DOI:
10.1088/1361-6528/abb04a
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发表时间:
2020-11-27
期刊:
影响因子:
3.5
通讯作者:
Camino, Fernando
Camino, Fernando
中科院分区:
材料科学3区
文献类型:
--
作者:
Xiao, Zhigang;Williams, Lauren;Camino, Fernando

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用作场效应晶体管(FET)中有源沟道材料的碳纳米结构因其改进的性能(例如高速和低能量耗散)而在微电子领域颇具吸引力。然而,这些器件需要在制造工艺流程中纳入纳米结构转移步骤,这使得它们在大规模集成电路中的应用变得困难。在这里,我们提出了一种在沟道中制造具有纳米结构碳的 FET 的新方法,该 FET 具有 p 型半导体特性和中等漏源电流 (I-DS) 开/关比。该方法基于使用源极-漏极间隙区域中的 Ni 纳米颗粒作为种子材料,用于在 FET 沟道中形成碳纳米结构。通道中没有 Ni 纳米粒子的 FET 没有表现出 I(DS) 作为栅极电压函数的调制。该器件制造过程不需要任何碳纳米结构转移步骤,因为它通过碳的电子束蒸发和传统光刻工艺直接形成与器件的源电极和漏电极电连接的碳纳米结构。由于所有器件制造步骤均与现有硅技术工艺兼容,因此能够按照半导体行业实践的工艺开发协议进一步优化它们。
Carbon nanostructures used as the active channel material in field effect transistors (FETs) are appealing in microelectronics for their improved performance, such as their high speed and low energy dissipation. However, these devices require the incorporation of nanostructure transfer steps in the fabrication process flow, which makes their application difficult in large scale integrated circuits. Here we present a novel method for the fabrication of FETs with nanostructured carbon in the channel with p-type semiconducting properties and intermediate drain-source current (I-DS) on/off ratio. The method is based on the use of Ni nanoparticles in the source-drain gap region as the seed material for the formation of carbon nanostructures in the FET channel. FETs without Ni nanoparticles in the channel showed no modulation ofI(DS)as a function of gate voltage. The device fabrication process does not require any carbon nanostructure transfer steps since it directly forms carbon nanostructures electrically connected to the device's source and drain electrodes via electron-beam evaporation of carbon and conventional lithographic processes. Since all device fabrication steps are compatible with existing Si technology processes, they are capable of being further optimized following process development protocols practiced by the semiconductor industry.