Low latency parallel implementation of traditionally-called stochastic circuits using deterministic shuffling networks
Low latency parallel implementation of traditionally-called stochastic circuits using deterministic shuffling networks
复制标题
使用确定性洗牌网络低延迟并行实现传统上称为随机电路的
DOI：
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发表时间：
2018
期刊：
影响因子：
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通讯作者：
K. Bazargan
中科院分区：
文献类型：
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作者：
Zhiheng Wang;S. Mohajer;K. Bazargan
近年来，随机计算(SC)被定义为对表示概率值的随机比特流进行操作的数字计算方法。在表示概率x的比特流中，每个比特具有概率x为1。使用这个简单的假设，SC可以用比传统的二进制方法小得多的硬件占用来执行复杂的任务：例如，简单的AND门可以在两个不相关的比特流之间执行乘法。以前关于SC电路的方法要么依赖于(1)输入比特流中的随机性，要么依赖于(2)最近对确定性流执行全卷积以获得准确的计算结果。第一种方法的问题是，它引入了高度随机波动，因此结果具有很高的可变性。第二种方法导致比特流的长度随着电路深度的增加而呈指数增长。这两种方法都有很长的等待时间，而且都不适合并行实现。我们的工作比以前的工作有了显著的改进：它提供了一种确定性并行比特混洗网络，它可以使用简单的确定性温度计对数据进行编码，从而实现零随机波动和高精度，同时保持输出比特流长度恒定。我们使用的核心“随机”逻辑电路不使用恒定系数，这使得它们比潜在地使用大量资源来生成这种恒定系数的传统随机逻辑电路小得多。在前馈和反馈电路上的实验结果表明，在10位二进制分辨率下，该方法的面积×延迟值平均比传统二进制算法小10.6倍，比以前的随机工作小7.9倍。
Stochastic Computing (SC) in recent years has been defined as a digital computation approach that operates on streams of random bits that represent probability values. In a bit-stream representing probability x, each bit has probability x of being 1. Using this simple assumption, SC can perform complex tasks with much smaller hardware footprints compared to conventional binary methods: e.g., a simple AND gate can perform multiplication between two uncorrelated bit-streams. Previous methods on SC circuits either relied on (1) randomness in the input bit streams, or (2) more recently, performing full convolution of deterministic streams to achieve exact computation results. The problem with the first method is that it introduces high random fluctuations and hence high variability in the results. The second method results in exponential increase in the length of the bit stream as circuit depth increases. Both of these methods suffer from very long latencies and neither is readily adaptable for parallel implementations. Our work presents a significant improvement over previous work: it provides a deterministic parallel bit shuffling network that can use a simple deterministic thermometer encoding of data, resulting in zero random fluctuation and high accuracy, yet keeping the output bit stream length constant. We use core “stochastic” logic circuits that do not employ constant coefficients, making them significantly smaller than traditional stochastic logic that potentially use a significant amount of resources to generate such constant coefficients. We show results on feed-forward and feedback circuits and show that our method on average has an area × delay value that is 10.6x smaller than of conventional binary and 7.9x smaller than previous stochastic work at 10-bit binary resolutions.