‘Zeppelin’: An SoC for multichip architectures

‘Zeppelin’: An SoC for multichip architectures
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“Zeppelin”:用于多芯片架构的 SoC

DOI:
10.1109/isscc.2018.8310173
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发表时间:
2018
期刊:
2018 IEEE International Solid - State Circuits Conference - (ISSCC)
影响因子:
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通讯作者:
S. Naffziger
S. Naffziger
中科院分区:
--
文献类型:
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作者:
Noah Beck;Sean White;Milam Paraschou;S. Naffziger

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AMD的下一代系统(SOC)代号为“ Zeppelin”,旨在在多个市场中使用多个产品和包装,包括服务器,主流PC桌面和高端台式机。 FinFET流程技术,“ Zeppelin” SOC超过4.8B晶体管。集成的X86 Southbridge芯片组功能。
Codenamed “Zeppelin”, AMD's next-generation System-on-a-Chip (SoC) was designed for use in multiple products and packages in multiple markets, including server, mainstream PC desktop, and high-end desktop. Utilizing GLOBALFOUNDRIES' 14nm LPP FinFET process technology, the “Zeppelin” SoC has over 4.8B transistors. It contains high-performance AMD x86 cores codenamed “Zen” [1][2], caches, memory controllers, PCIe®, SATA, and other IO controllers, and integrated x86 southbridge chipset capabilities. All these functions are connected on the SoC and between multichip packages and multi-socket systems by AMD Infinity Fabric.