Load-Balanced Combined Input-Crosspoint Buffered Packet Switches
Load-Balanced Combined Input-Crosspoint Buffered Packet Switches
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DOI：
10.1109/tcomm.2011.040111.100256
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发表时间：
2011-05
影响因子：
8.3
通讯作者：
R. Rojas-Cessa;Z. Dong
中科院分区：
文献类型：
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作者：
R. Rojas-Cessa;Z. Dong
组合输入-交叉点缓冲(CICB)交换机可以在不增加加速比的情况下获得高交换性能。然而，CICB交换机中的专用交叉点缓冲区可能没有得到有效利用，并且可能会出现吞吐量下降。在线路卡和缓冲交叉开关之间具有高数据速率和长距离的流的情况下，这种吞吐量降级尤其明显。介绍了两种负载均衡CICB交换机：具有完全访问的负载均衡CICB交换机(LB-CICB-FA)和具有单一访问的负载均衡CICB交换机(LB-CICB-SA)。所提出的交换机有效地利用了交叉点缓冲区，并支持线路卡和缓存的交叉点之间的长距离，交叉点缓冲区比CICB交换机中的交叉点缓冲区小N倍，其中N是端口数。证明了随机选择负载平衡级、输入队列和交叉点队列结构的LB-CICB-FA交换机在允许的独立同分布(I.I.D.)下是弱稳定的。堵车。另外的仿真结果支持了理论分析的正确性。此外，还证明了在允许的I.I.D.下，以最长队列优先(LQF)和先到先服务(FCFS)为输入和输出仲裁的LB-CICB-SA交换机的吞吐量为100%。堵车。所提出的交换保持信元的顺序，并且不使用加速比。讨论了负载均衡阶段的低实现复杂性，并证明其很小。
Combined input-crosspoint buffered (CICB) switches can achieve high switching performance without speedup. However, the dedicated crosspoint buffers in a CICB switch may not be efficiently used, and throughput degradation may occur. This throughput degradation is especially observable under flows with high data rates and long distances between the line cards and the buffered crossbar. This paper introduces two load-balanced CICB switches: the load-balancing CICB switch with full access (LB-CICB-FA) and the load-balancing CICB switch with single access (LB-CICB-SA). The proposed switches use the crosspoint buffers efficiently and support long distances between the line cards and buffered crossbar with crosspoint buffers smaller than those in a CICB switch by a factor of N, where N is the number of ports. It is proven that the LB-CICB-FA switch with random selection of the configuration of the load-balancing stage, input queues, and crosspoint queues is weakly stable under admissible independent and identical distributed (i.i.d.) traffic. Additional simulation results support the correctness of the theoretical analysis. Furthermore, it is shown that the throughput of the LB-CICB-SA switch with the longest-queue first (LQF) and first-come first-served (FCFS) as input and output arbitrations, respectively, is 100% under admissible i.i.d. traffic. The proposed switches keep cells in sequence and use no speedup. The low implementation complexity of the load-balancing stage is discussed and shown to be small.