A 1-GHz 16-Element Four-Beam True-Time-Delay Digital Beamformer

A 1-GHz 16-Element Four-Beam True-Time-Delay Digital Beamformer
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1GHz 16 元件四波束实时延迟数字波束形成器

DOI:
10.1109/jssc.2019.2894357
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发表时间:
2019
影响因子:
5.4
通讯作者:
M. Flynn
M. Flynn
中科院分区:
工程技术1区
文献类型:
--
作者:
Sunmin Jang;Rundao Lu;J. Jeong;M. Flynn

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相控阵由于其低功率和小面积使用而被广泛使用。然而,相控阵取决于窄带假设,因此不适合高带宽应用。新兴的通信标准需要越来越高的带宽来提高数据速率,这导致需要定时阵列。然而,高功耗和大面积的要求是射频(RF)定时阵列的缺点。为了解决这些问题,我们介绍了第一个真正的时间延迟数字波束形成集成电路,它消除波束斜视误差,采用基带真正的时间延迟技术。此外,我们提出了一个恒定的输出阻抗电流舵数模转换器(DAC),它提高了7 dB的带通Δ-Σ调制器的无杂散动态范围(SFDR)。由于采用了新的DAC架构,16单元波束形成器将阵列的SFDR提高了13.7 dB。对于5-MBd正交幅度调制(QAM)-64,QAM-256和QAM-512,测量的误差矢量幅度(EVM)优于37 dB。原型波束形成器实现了用于常规和自适应波束形成的几乎理想的波束图案(即,自适应调零和锥形化)。在3dB波束宽度内,归一化的测量波束图案和归一化的模拟波束图案之间的差异小于1dB。该波束形成器包括16个带通模数转换器(ADC),占地0.29 mm 2,总功耗453 mW。
Phased arrays are widely used due to their low power and small area usage. However, phased arrays depend on the narrowband assumption and, therefore, are not suitable for high-bandwidth applications. Emerging communication standards require increasingly higher bandwidths for improved data rates, which results in a need for timed arrays. However, high power consumption and large area requirements are drawbacks of radio frequency (RF) timed arrays. To resolve these issues, we introduce the first true-time-delay digital beamforming IC, which eliminates beam squinting error by adopting a baseband true-time-delay technique. Furthermore, we present a constant output impedance current-steering digital-to-analog converter (DAC), which improves the spurious-free dynamic range (SFDR) of a bandpass delta–sigma modulator by 7 dB. Due to the new DAC architecture, the 16-element beamformer improves SFDR by 13.7 dB from the array. Measured error vector magnitudes (EVMs) are better than 37 dB for 5-MBd quadratic-amplitude modulation (QAM)-64, QAM-256, and QAM-512. The prototype beamformer achieves nearly ideal beam patterns for both conventional and adaptive beamforming (i.e., adaptive nulling and tapering). The difference between normalized measured beam patterns and normalized simulated beam patterns is less than 1 dB within the 3-dB beamwidth. The beamformer, including 16 bandpass analog-to-digital converters (ADCs) occupies 0.29 mm2 and consumes 453 mW in total power.