Verilog-A Based Effective Complementary Resistive Switch Model for Simulations and Analysis
Verilog-A Based Effective Complementary Resistive Switch Model for Simulations and Analysis
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DOI：
10.1109/les.2013.2278740
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发表时间：
2014-03
影响因子：
1.6
通讯作者：
Yuanfan Yang;J. Mathew;R. Shafik;D. Pradhan
中科院分区：
文献类型：
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作者：
Yuanfan Yang;J. Mathew;R. Shafik;D. Pradhan
电阻式存储器，也称为忆阻器，最近成为传统基于电荷的存储器的潜在继承者。然而，这些器件的纳米级特征在建模和仿真中引入了挑战。在本文中，我们提出了一种新的基于Verilog-A的互补电阻开关存储器模型进行有效的模拟和分析。我们提出的模型捕获所需的非线性特性，使用基于电压的状态控制，而不是最近提出的基于电流的状态控制。我们证明，这种状态控制的优势，我们提出的CRS模型为基础的交叉阵列对称的开/关电压和显着降低潜路径电流与传统的忆阻器为基础的架构相比，具有高噪声容限。此外，为了验证我们的Verilog-A为基础的模型的有效性，我们进行了广泛的模拟和分析不同的交叉阵列架构，使用传统的EDA工具。
Resistive memory, also known as memristor, is recently emerging as a potential successor to traditional charge-based memories. However, the nanoscale features of these devices introduce challenges in modeling and simulation. In this paper, we propose a novel Verilog-A based complementary resistive switch memory model for effective simulation and analysis. Our proposed model captures desired nonlinear characteristics using voltage based state control as opposed to recently proposed current based state control. We demonstrate that such state control has advantages for our proposed CRS model based crossbar arrays in terms of symmetric ON/OFF voltages and significantly reduced sneak path currents with high noise margin compared to traditional memristor based architectures. Moreover, to validate the effectiveness of our Verilog-A based model we carry out extensive simulations and analyses for different crossbar array architectures using traditional EDA tools.