A CMOS Vision System On-Chip with Multi-Core, Cellular Sensory-Processing Front-End
A CMOS Vision System On-Chip with Multi-Core, Cellular Sensory-Processing Front-End
复制标题
具有多核、蜂窝传感处理前端的片上 CMOS 视觉系统
DOI：
10.1007/978-1-4419-1011-0_6
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发表时间：
2010
影响因子：
1.1
通讯作者：
R. Romay
中科院分区：
文献类型：
--
作者：
Angel Rodr ´ õguez;Alberto Garc;C. Utrera;R. Romay
本章介绍了一个视觉系统片上（VSoC）能够做：图像采集，图像处理，通过片上嵌入式结构，并在数千帧每秒的速率产生相关的反应命令。该芯片采用分布式处理架构，具有由可编程传感处理单元阵列组成的预处理阶段和由数字微处理器组成的后处理阶段。预处理阶段作为视网膜样传感器前端操作。它对与处理器嵌入在一起的传感器捕获的图像进行并行处理。这种早期处理用于提取与预期任务相关的图像特征。前端还结合了智能读出结构，其被设想为仅传输这些相关特征，从而排除了要编码和传输的全灰度帧。该芯片能够在1,000 F/s以上的速度下，以低于1 W峰值的功率预算，基于对视觉流的分析来关闭动作-反应回路。此外，靠近传感器的处理器的结合实现了传感器增益的信号相关的局部适应，从而实现了高动态范围信号采集。
This chapter describes a vision-system-on-chip (VSoC) capable of doing: image acquisition, image processing through on-chip embedded structures, and generation of pertinent reaction commands at thousands frame-per-second rate. The chip employs a distributed processing architecture with a pre-processing stage consisting of an array of programmable sensory-processing cells, and a post-processing stage consisting of a digital microprocessor. The pre-processing stage operates as a retina-like sensor front-end. It performs parallel processing of the images captured by the sensors which are embedded together with the processors. This early processing serves to extract image features relevant to the intended tasks. The front-end incorporates also smart read-out structures which are conceived to transmit only these relevant features, thus precluding full gray-scale frames to be coded and transmitted. The chip is capable to close action–reaction loops based on the analysis of visual flow at rates above 1,000 F/s with power budget below 1 W peak. Also, the incorporation of processors close to the sensors enables signal-dependent, local adaptation of the sensor gains and hence high-dynamic range signal acquisition.