A 0.54 pJ/b 20 Gb/s Ground-Referenced Single-Ended Short-Reach Serial Link in 28 nm CMOS for Advanced Packaging Applications

A 0.54 pJ/b 20 Gb/s Ground-Referenced Single-Ended Short-Reach Serial Link in 28 nm CMOS for Advanced Packaging Applications
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适用于高级封装应用的 28 nm CMOS 中的 0.54 pJ/b 20 Gb/s 接地参考单端短距离串行链路

DOI:
10.1109/jssc.2013.2279053
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发表时间:
2013
影响因子:
5.4
通讯作者:
C. T. Gray
C. T. Gray
中科院分区:
工程技术1区
文献类型:
--
作者:
J. Poulton;W. Dally;X. Chen;J. Eyles;Thomas H. Greer;S. Tell;John M. Wilson;C. T. Gray

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有机封装基板或硅中介层上的高密度互连上的高速信号为现代数字系统中面临的片外带宽限制问题提供了有吸引力的解决方案。在本文中,我们描述了一种与互连共同设计的信号系统,以利用该环境的特性来实现高速、小面积和低功耗的芯片到芯片链路。接地参考信号 (GRS) 是一种单端信号系统,通过使用地平面作为参考并在地面以上和地下发出信号,消除了传统上与单端设计相关的主要问题。该设计采用了新颖的电荷泵驱动器,还消除了同步开关噪声和数据独立电流消耗的问题。对在标准 28 nm 工艺中实现两个 16 通道链路(具有转发时钟)的测试芯片进行的硅测量表明,在标称 0.9 V 电源电压下,在 4.5 mm 有机基板通道上以 0.54 pJ/bit 实现 20 Gb/s 运行。 BER 为 10-12 时,接收器的时序余量 >0.3 UI。我们估计眼睛中心的 BER 为 10-25。
High-speed signaling over high density interconnect on organic package substrates or silicon interposers offers an attractive solution to the off-chip bandwidth limitation problem faced in modern digital systems. In this paper, we describe a signaling system co-designed with the interconnect to take advantage of the characteristics of this environment to enable a high-speed, low area, and low-power die to die link. Ground-Referenced Signaling (GRS) is a single-ended signaling system that eliminates the major problems traditionally associated with single-ended design by using the ground plane as the reference and signaling above and below ground. This design employs a novel charge pump driver that additionally eliminates the issue of simultaneous switching noise with data independent current consumption. Silicon measurements from a test chip implementing two 16-lane links, with forwarded clocks, in a standard 28 nm process demonstrate 20 Gb/s operation at 0.54 pJ/bit over 4.5 mm organic substrate channels at a nominal 0.9 V power supply voltage. Timing margins at the receiver are >0.3 UI at a BER of 10-12. We estimate BER 10-25 at the eye center.