DCD – The Multi-Channel Current-Mode ADC Chip for the Readout of DEPFET Pixel Detectors
DCD – The Multi-Channel Current-Mode ADC Chip for the Readout of DEPFET Pixel Detectors
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DCD – 用于读出 DEPFET 像素检测器的多通道电流模式 ADC 芯片
DOI：
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发表时间：
2010
影响因子：
1.8
通讯作者：
P. Fischer
中科院分区：
文献类型：
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作者：
I. Perić;T. Armbruster;M. Koch;C. Kreidl;P. Fischer
介绍了一种用于高空间分辨率DEPFET粒子像素探测器读出的电流模ADC芯片原型。这些DEPFET探测器计划用于ILC和贝儿II的顶点探测器。该芯片具有72个ADC通道。每个通道使用两个并行工作的循环ADC处理输入信号。循环ADC基于电流模式存储器单元。在8位分辨率的情况下，一个ADC的实测信噪比约为660（快速ADC变体：520），其转换时间为320 ns（快速ADC变体：160 ns）。冗余符号数字循环转换用于自动数字纠错。一个ADC核的面积仅为40 m × 55 m，静态功耗为0.96 mW。除了两个ADC外，每个通道还包含一个稳压共源共栅放大器和两个额外的电流模式存储器单元，可对输入信号进行双采样。由于需要高辐射耐受性，该芯片已实现在180纳米CMOS技术使用封闭的NMOS栅极布局。新的抗辐射电路已经被使用。该芯片还被用来读出一个小的DEPFET测试矩阵。
The current-mode ADC chip-prototype for the readout of DEPFET particle pixel-detectors with high spatial resolution is presented. The planned application of these DEPFET detectors are vertex detectors for ILC and Belle II. The chip has 72 ADC channels. Every channel processes the input signals using two cyclic ADCs that operate in parallel. The cyclic ADCs are based on current-mode memory cells. The measured signal to noise ratio of one ADC is about 660 (fast ADC variant: 520) and its conversion time is 320 ns (fast ADC variant: 160 ns) in the case of 8-bit resolution. Redundant signed-digit cyclic conversion is used for automated digital error correction. One ADC-core occupies only 40 ¿m × 55 ¿m, its static power consumption is 0.96 mW. Besides the two ADCs, every channel contains a regulated cascode and two additional current-mode memory cells that allow double-sampling of the input signal. Due to the need for high radiation tolerance, the chip has been implemented in a 180 nm CMOS technology using enclosed NMOS gate layouts. Novel radiation-hard circuits have been used. The chip has also been used to read out a small DEPFET test matrix.