A self-adjusting clock tree architecture to cope with temperature variations

A self-adjusting clock tree architecture to cope with temperature variations
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自调节时钟树架构以应对温度变化

DOI:
10.1109/iccad.2007.4397247
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发表时间:
2007
期刊:
IEEE/ACM International Conference on Computer-Aided Design
影响因子:
--
通讯作者:
Y. Ismail
Y. Ismail
中科院分区:
--
文献类型:
--
作者:
Jieyi Long;J. Ku;S. Memik;Y. Ismail

文献摘要

被引文献

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确保对环境变化的适应能力正成为芯片设计的最大挑战之一。在本文中,我们提出了一种自调整的时钟树架构,SACTA,以提高芯片的性能和可靠性,在芯片上的温度变化的存在。SACTA执行温度相关的动态时钟偏斜调度,以防止流水线电路中的时序违规。我们提出了一种自动温度可调的偏斜缓冲器设计,使SACTA的自适应功能。此外,我们提出了一个有效的和一般的优化框架,以确定这些特殊的延迟元件的配置。实验结果表明,由SACTA支持的流水线能够在更大的工作温度范围内防止热致时序违规(将无违规范围提高高达45摄氏度)。
Ensuring resilience against environmental variations is becoming one of the great challenges of chip design. In this paper, we propose a self adjusting clock tree architecture, SACTA, to improve chip performance and reliability in the presence of on-chip temperature variations. SACTA performs temperature dependent dynamic clock skew scheduling to prevent timing violations in a pipelined circuit. We present an automatic temperature adjustable skew buffer design, which enables the adaptive feature of SACTA. Furthermore, we propose an efficient and general optimization framework to determine the configuration of these special delay elements. Experimental results show that a pipeline supported by SACTA is able to prevent thermal induced timing violations within a significantly larger range of operating temperatures (enhancing the violation-free range by as much as 45degC).