Parallel modular multiplication using 512-bit advanced vector instructions
Parallel modular multiplication using 512-bit advanced vector instructions
复制标题
使用 512 位高级向量指令的并行模乘法
DOI:
10.1007/s13389-021-00256-9
复制
发表时间:
2021
影响因子:
1.9
通讯作者:
C. Haider
中科院分区:
文献类型:
--
作者:
B. Buhrow;B. Gilbert;C. Haider
Applications such as public-key cryptography are critically reliant on the speed of modular multiplication for their performance. This paper introduces a new block-based variant of Montgomery multiplication, the Block Product Scanning (BPS) method, which is particularly efficient using new 512-bit advanced vector instructions (AVX-512) on modern Intel processor families. Our parallel-multiplication approach also allows for squaring and sub-quadratic Karatsuba enhancements. We demonstrateimprovement in decryption throughput in comparison with OpenSSL andimprovement in modular exponentiation throughput compared to GMP-6.1.2 on an Intel Xeon CPU. In addition, we showimprovement in decryption throughput in comparison with state-of-the-art vector implementations on many-core Knights Landing Xeon Phi hardware. Finally, we show how interleaving Chinese remainder theorem-based RSA calculations within our parallel BPS technique halves decryption latency while providing protection against fault-injection attacks.