A Hardware in the Loop Benchmark Suite to Evaluate NIST LWC Ciphers on Microcontrollers
A Hardware in the Loop Benchmark Suite to Evaluate NIST LWC Ciphers on Microcontrollers
复制标题
用于评估微控制器上的 NIST LWC 密码的硬件在环基准套件
DOI:
--
复制
发表时间:
2020
期刊:
影响因子:
--
通讯作者:
J. Mottok
中科院分区:
文献类型:
--
作者:
Sebastian Renner;Enrico Pozzobon;J. Mottok
. The National Institute of Standards and Technology (NIST) started the standardization process for lightweight cryptography algorithms in 2018. By the end of the first round, 32 submissions have been selected as 2nd round candidates. NIST allowed designers of 2nd round submissions to provide small updates on both their specifications and implementation packages. In this work, we introduce a benchmarking framework for evaluating the performance of NIST Lightweight Cryptography (LWC) candidates on embedded platforms. We show the features and application of the framework and explain its design rationale. Moreover, we provide information on how we aim to present up-to-date performance figures throughout the NIST LWC competition. In this paper, we present an excerpt of our software benchmarking results regarding speed and memory requirements of selected ciphers. All up-to-date results, including benchmarking different test cases for multiple variants of each 2nd round algorithm on five different microcontrollers, are periodically published to a public website. While initially only the reference implementations were available, the ability of automatically testing the performance of the candidate algorithms on multiple platforms becomes especially relevant as more optimized implementations are developed. Finally, we show how the framework can be extended in different directions: support for more target platforms can be easily added, different kinds of algorithms can be tested, and other test metrics can be acquired. The focus of this paper should rather lay on the framework design and testing methodology than on the current results, especially for reference code.