A low cost, multithreaded processing-in-memory system
A low cost, multithreaded processing-in-memory system
复制标题
低成本、多线程内存处理系统
DOI：
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发表时间：
2004
期刊：
影响因子：
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通讯作者：
P. Kogge
中科院分区：
文献类型：
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作者：
J. Brockman;Shyamkumar Thoziyoor;Shannon K. Kuntz;P. Kogge
本文讨论了一个PIM系统，可以作为主机处理器的存储器系统的成本与性能的权衡。对于增加不到两倍的商品DRAM部分的成本，它是可能的，以实现一个性能加速的近4倍的不规则应用。这种成本效率来自于开发一种非常适合嵌入内存的自定义多线程处理器架构和实现风格。具体来说，它利用低延迟和高行带宽来简化处理器设计-减少面积-以及提高处理吞吐量。为了支持我们对成本和性能的要求，我们使用了仿真，对现有芯片进行了分析，并设计和完全实现了原型芯片PIM Lite。
This paper discusses die cost vs. performance tradeoffs for a PIM system that could serve as the memory system of a host processor. For an increase of less than twice the cost of a commodity DRAM part, it is possible to realize a performance speedup of nearly a factor of 4 on irregular applications. This cost efficiency derives from developing a custom multithreaded processor architecture and implementation style that is well-suited for embedding in a memory. Specifically, it takes advantage of the low latency and high row bandwidth to both simplify processor design --- reducing area --- as well as to improve processing throughput. To support our claims of cost and performance, we have used simulation, analysis of existing chips, and also designed and fully implemented a prototype chip, PIM Lite.