Achieving energy efficiency through runtime partial reconfiguration on reconfigurable systems

Achieving energy efficiency through runtime partial reconfiguration on reconfigurable systems
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通过可重新配置系统上的运行时部分重新配置来实现能源效率

DOI:
10.1145/2442116.2442122
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发表时间:
2013
期刊:
TECS
影响因子:
--
通讯作者:
J. Gaudiot
J. Gaudiot
中科院分区:
--
文献类型:
--
作者:
Shaoshan Liu;Richard Neil Pittman;A. Forin;J. Gaudiot

文献摘要

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可重构计算系统的一个主要优点是它们能够在运行时重新配置硬件。在本文中,我们研究了在可重构计算系统中实现能量效率的可行性(例如,FPGA)通过运行时部分重新配置(PR)技术。在理想情况下,我们使用硬件加速器来加速程序执行的某些部分;当加速器不活动时,我们使用部分重新配置来卸载它以降低功耗。由于重新配置过程可能引入高能量开销,因此不清楚该方法是否有效。为了解决这个问题,我们首先分析确定的条件下,部分重新配置可以减少能源消耗。我们的研究结果表明,减少部分重构能量开销的关键是最小化重构过程的时间开销。基于此分析,我们设计并实现了一个快速的重新配置引擎,实现接近理想的吞吐量Xilinx Virtex-4 FPGA。我们的快速重新配置引擎利用主从DMA对在SRAM和内部配置访问端口(ICAP)之间传输数据。我们实验验证我们提出的解决方案,并比较我们的设计现有的节能技术,如时钟门控。我们的研究结果表明,通过使用部分重新配置,以消除功耗的加速器时,它是不活跃的,我们可以加快程序的执行,同时减少了一半的整体能耗。
One major advantage of reconfigurable computing systems is their ability to reconfigure hardware at runtime. In this paper, we study the feasibility of achieving energy efficiency in reconfigurable computing systems (e.g., FPGAs) through runtime partial reconfiguration (PR) techniques. In the ideal scenario, we use a hardware accelerator to accelerate certain parts of the program execution; when the accelerator is not active, we use partial reconfiguration to unload it to reduce power consumption. Since the reconfiguration process may introduce a high energy overhead, it is unclear whether this approach is efficient. To approach this problem, we first analytically identify the conditions under which partial reconfiguration can reduce energy consumption. Our results indicate that the key to reduce partial reconfiguration energy overhead is to minimize the time overhead of the reconfiguration process. Based on this analysis, we design and implement a fast reconfiguration engine that achieves close-to-ideal throughput on Xilinx Virtex-4 FPGAs. Our fast reconfiguration engine utilizes a master-slave DMA pair to stream data between the SRAM and the Internal Configuration Access Port (ICAP). We experimentally verify our proposed solutions and compare our design to existing energy reduction techniques, such as clock gating. The results of our study show that by using partial reconfiguration to eliminate the power consumption of the accelerator when it is inactive, we can accelerate program execution and at the same time reduce the overall energy consumption by half.