Residual stress analysis on silicon wafer surface layers induced by ultra-precision grinding
Residual stress analysis on silicon wafer surface layers induced by ultra-precision grinding
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超精磨削硅片表层残余应力分析
DOI：
10.1007/s12598-011-0383-5
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发表时间：
2011-06-01
期刊：
影响因子：
8.8
通讯作者：
Kang Renke
中科院分区：
文献类型：
--
作者：
Zhang Yinxia;Wang Dong;Kang Renke
硅片的磨削残余应力影响集成电路的性能。基于硅片旋转式超精密磨削机，利用显微拉曼光谱技术研究了硅片磨削后残余应力沿磨削痕迹和磨削表面层深度的沿着分布。结果表明，磨削后的硅片表面主要呈现压应力状态。两个磨痕之间的堆积附近呈现较高的压应力。由于材料是以脆性断裂方式去除的，因此粗磨晶片的应力值最小。半精磨晶片的应力最大，因为晶片表面呈现较强的相变和弹塑性变形。细磨晶片的应力介于两者之间。粗糙、半精细和精细研磨晶片的应变层深度分别约为7.6 μm、2.6 μm和1.1 μm。相变和弹塑性变形是产生残余应力的主要原因。
Grinding residual stresses of silicon wafers affect the performance of IC circuits. Based on the wafer rotation ultra-precision grinding machine, the residual stress distribution along grinding marks and ground surface layer depth of the ground wafers are investigated using Raman microspectroscopy. The results show that the ground wafer surfaces mainly present compressive stress. The vicinity of pile-ups between two grinding marks presents higher a compressive stress. The stress value of the rough ground wafer is the least because the material is removed by the brittle fracture mode. The stress of the semi-fine ground wafer is the largest because the wafer surface presents stronger phase transformations and elastic-plastic deformation. The stress of the fine ground wafer is between the above two. The strained layer depths for the rough, semi-fine, and fine ground wafers are about 7.6 μm, 2.6 μm, and 1.1 μm, respectively. The main reasons for generation of residual stresses are phase transformations and elastic-plastic deformation.