A 0.9V 150MHz 10mW 4mm^2 2-D Discrete Cosine Transform Core Processor with Variable-Threshold-Voltage Scheme

A 0.9V 150MHz 10mW 4mm^2 2-D Discrete Cosine Transform Core Processor with Variable-Threshold-Voltage Scheme
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具有可变阈值电压方案的 0.9V 150MHz 10mW 4mm^2 2-D 离散余弦变换核心处理器

DOI:
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发表时间:
1996
期刊:
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影响因子:
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通讯作者:
Takayasu Sakurai
Takayasu Sakurai
中科院分区:
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文献类型:
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作者:
Tadahiro Kuroda;Tetsuya Fujita;S. Mita;Shinichi Yoshioka;Kojiro Suzuki;Masakazu Kakumu;Takayasu Sakurai

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一款4mm2、二维(2-D)8 8离散余弦变换(DCT)核心处理器,用于0.3M CMOS三井双金属技术中的HDTV分辨率视频压缩/解压缩,在0.9V电源下以150 MHz的速度运行,功耗10 mW,仅为以前3.3V设计的2%功耗。引入了阈值电压动态变化的电路技术(VT方案)来降低有功功耗,而在速度、待机功耗和芯片面积方面的开销可以忽略不计。研究了一种开发VDD Vth设计空间的方法。
A 4 mm2, two-dimensional (2-D) 8 8 discrete cosine transform (DCT) core processor for HDTV-resolution video compression/decompression in a 0.3m CMOS triple-well, double-metal technology operates at 150 MHz from a 0.9-V power supply and consumes 10 mW, only 2% power dissipation of a previous 3.3-V design. Circuit techniques for dynamically varying threshold voltage (VT scheme) are introduced to reduce active power dissipation with negligible overhead in speed, standby power dissipation, and chip area. A way to exploreVDD Vth design space is also studied.
低功耗、高速 CMOS 运动估计器 LSI
DOI: --
发表时间: 2003
期刊: Proc.of International Symposium on Circuits and Systems (ISCAS'2003), in Bangkok, Thailand vol-V
影响因子: --
作者:
T.Enomoto;T.Ei
通讯作者: T.Ei