A 1.8V, sub-mW, over 100% locking range, divide-by-3 and 7 complementary-injection-locked 4 GHz frequency divider

A 1.8V, sub-mW, over 100% locking range, divide-by-3 and 7 complementary-injection-locked 4 GHz frequency divider
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DOI:
10.1109/cicc.2009.5280853
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发表时间:
2009-10
期刊:
2009 IEEE Custom Integrated Circuits Conference
影响因子:
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通讯作者:
Yung-Chung Lo;Hsien-Pu Chen;J. Silva-Martínez;S. Hoyos
Yung-Chung Lo;Hsien-Pu Chen;J. Silva-Martínez;S. Hoyos
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其他
文献类型:
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作者:
Yung-Chung Lo;Hsien-Pu Chen;J. Silva-Martínez;S. Hoyos

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提出了一种基于低功耗奇比环振荡器的互补注入锁频分频器。多输入互补注入方案将其锁定范围扩大到100%以上,以充分覆盖PVT变化。CILFD只消耗动态功率,对于较大的分割比没有额外的功率惩罚。差分输入输出采用辅助交叉连接逆变器实现。分割比为3和7的cilfd采用0.18µm CMOS技术实现。测量结果表明,锁频范围为1.4 ~ 4.4 GHz,输入入射功率为−4 dBm。当锁定在4.7 GHz时,单个1.8 v电源的功耗为0.9 mW。
A low-power wideband divide-by-odd-ratio ring-oscillator-based complementary-injection-locked frequency divider (CILFD) is proposed. The multiple-input complementary-injection scheme widens its locking range over 100% to sufficiently cover the PVT variations. The CILFD consumes dynamic power only with no additional power penalty for larger division ratios. The differential input and output are realized employing auxiliary cross-connected inverters. The CILFDs with division ratios of 3 and 7 are implemented in a 0.18 µm CMOS technology. The measurement results show a locking range from 1.4 to 4.4 GHz with an input incident power of −4 dBm. The power consumption while locked at 4.7 GHz is 0.9 mW from a single 1.8-V power supply.